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| author | John Crispin <blogic@openwrt.org> | 2015-02-03 10:11:11 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-02-03 10:11:11 +0000 |
| commit | 3131f64da4e8ff808d0eb439f6868e88464c80cf (patch) | |
| tree | 4926762677d7ddd0549577b73e0e34b4f7adafdf /target/linux/ramips/patches-3.14 | |
| parent | 17a17ddc41f485b3e4b0d631528f8bd936d7d50f (diff) | |
| download | master-187ad058-3131f64da4e8ff808d0eb439f6868e88464c80cf.tar.gz master-187ad058-3131f64da4e8ff808d0eb439f6868e88464c80cf.tar.bz2 master-187ad058-3131f64da4e8ff808d0eb439f6868e88464c80cf.zip | |
ralink: fix USB host function for Intenso M2M
The ubootloader of the M2M sets the reset bits for
both USB device and USB host during initialization
(to save a few mA of power during boot).
However, for the usb<->sata bridge to be properly
detected, it is necessary to clear both reset bits
as otherwise the kernel logs will just be filled
with:
usb 1-1: device descriptor read/64, error -145
...
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44248 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.14')
| -rw-r--r-- | target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch index 9920afbac3..b5c199a851 100644 --- a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch +++ b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch @@ -37,7 +37,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +obj-$(CONFIG_RALINK_USBPHY) += ralink-phy.o --- /dev/null +++ b/drivers/usb/phy/ralink-phy.c -@@ -0,0 +1,191 @@ +@@ -0,0 +1,193 @@ +/* + * Copyright (C) 2013 John Crispin <blogic@openwrt.org> + * @@ -103,6 +103,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1); + if (!IS_ERR(rsthost)) + reset_control_deassert(rsthost); ++ if (!IS_ERR(rstdev)) ++ reset_control_deassert(rstdev); + } else { + rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1); + if (!IS_ERR(rstdev)) |