aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/files
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2009-10-07 11:37:00 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-10-07 11:37:00 +0000
commitc346f568c7761992e35a17834fb31e29552afd2c (patch)
treee2def143b9e2e2f7307843c33c6c0634456d061e /target/linux/ramips/files
parent780a9c28ce3c7b0e61cfe2b80323ab19887450a1 (diff)
downloadmaster-187ad058-c346f568c7761992e35a17834fb31e29552afd2c.tar.gz
master-187ad058-c346f568c7761992e35a17834fb31e29552afd2c.tar.bz2
master-187ad058-c346f568c7761992e35a17834fb31e29552afd2c.zip
ramips: protect rt288x pci config accesses with a spinlock
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17971 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files')
-rw-r--r--target/linux/ramips/files/arch/mips/pci/pci-rt288x.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
index fb3a6b13e5..4894882169 100644
--- a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
+++ b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
@@ -41,6 +41,7 @@
#define PCI_ACCESS_WRITE 1
static void __iomem *rt2880_pci_base;
+static DEFINE_SPINLOCK(rt2880_pci_lock);
static u32 rt2880_pci_reg_read(u32 reg)
{
@@ -72,9 +73,12 @@ static void config_access(unsigned char access_type, struct pci_bus *bus,
static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *val)
{
+ unsigned long flags;
u32 data = 0;
+ spin_lock_irqsave(&rt2880_pci_lock, flags);
config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
+ spin_unlock_irqrestore(&rt2880_pci_lock, flags);
if (size == 1)
*val = (data >> ((where & 3) << 3)) & 0xff;
@@ -89,8 +93,10 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
+ unsigned long flags;
u32 data = 0;
+ spin_lock_irqsave(&rt2880_pci_lock, flags);
if (size == 4) {
data = val;
} else {
@@ -104,6 +110,7 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
}
config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data);
+ spin_unlock_irqrestore(&rt2880_pci_lock, flags);
return PCIBIOS_SUCCESSFUL;
}
@@ -138,11 +145,15 @@ static inline void read_config(unsigned long bus, unsigned long dev,
unsigned long *val)
{
unsigned long address;
+ unsigned long flags;
address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
0x80000000;
+
+ spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
*val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
+ spin_unlock_irqrestore(&rt2880_pci_lock, flags);
}
static inline void write_config(unsigned long bus, unsigned long dev,
@@ -150,11 +161,15 @@ static inline void write_config(unsigned long bus, unsigned long dev,
unsigned long val)
{
unsigned long address;
+ unsigned long flags;
address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
0x80000000;
+
+ spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
+ spin_unlock_irqrestore(&rt2880_pci_lock, flags);
}
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)