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author | John Crispin <blogic@openwrt.org> | 2014-01-19 17:27:13 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2014-01-19 17:27:13 +0000 |
commit | cbd4880e3ce3dc60748e9a57b01c51f1d1221a21 (patch) | |
tree | 8ad6df74bb3f33de192112ff3207bce3c698e4c8 /target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c | |
parent | c0a637de039dff73ea4ed379e7eb385cf8d26e3d (diff) | |
download | master-187ad058-cbd4880e3ce3dc60748e9a57b01c51f1d1221a21.tar.gz master-187ad058-cbd4880e3ce3dc60748e9a57b01c51f1d1221a21.tar.bz2 master-187ad058-cbd4880e3ce3dc60748e9a57b01c51f1d1221a21.zip |
ralink: add xhci driver
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39328 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c')
-rw-r--r-- | target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c b/target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c new file mode 100644 index 0000000000..ebaf7c8b15 --- /dev/null +++ b/target/linux/ramips/files/drivers/usb/host/mtk-phy-ahb.c @@ -0,0 +1,58 @@ +#include "mtk-phy.h" +#ifdef CONFIG_U3D_HAL_SUPPORT +#include "mu3d_hal_osal.h" +#endif + +#ifdef CONFIG_U3_PHY_AHB_SUPPORT +#include <linux/gfp.h> +#include <linux/kernel.h> +#include <linux/slab.h> + +#ifndef CONFIG_U3D_HAL_SUPPORT +#define os_writel(addr,data) {\ + (*((volatile PHY_UINT32*)(addr)) = data);\ + } +#define os_readl(addr) *((volatile PHY_UINT32*)(addr)) +#define os_writelmsk(addr, data, msk) \ + { os_writel(addr, ((os_readl(addr) & ~(msk)) | ((data) & (msk)))); \ + } +#define os_setmsk(addr, msk) \ + { os_writel(addr, os_readl(addr) | msk); \ + } +#define os_clrmsk(addr, msk) \ + { os_writel(addr, os_readl(addr) &~ msk); \ + } +/*msk the data first, then umsk with the umsk.*/ +#define os_writelmskumsk(addr, data, msk, umsk) \ +{\ + os_writel(addr, ((os_readl(addr) & ~(msk)) | ((data) & (msk))) & (umsk));\ +} + +#endif + +PHY_INT32 U3PhyWriteReg32(PHY_UINT32 addr, PHY_UINT32 data) +{ + os_writel(addr, data); + + return 0; +} + +PHY_INT32 U3PhyReadReg32(PHY_UINT32 addr) +{ + return os_readl(addr); +} + +PHY_INT32 U3PhyWriteReg8(PHY_UINT32 addr, PHY_UINT8 data) +{ + os_writelmsk(addr&0xfffffffc, data<<((addr%4)*8), 0xff<<((addr%4)*8)); + + return 0; +} + +PHY_INT8 U3PhyReadReg8(PHY_UINT32 addr) +{ + return ((os_readl(addr)>>((addr%4)*8))&0xff); +} + +#endif + |