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| author | John Crispin <blogic@openwrt.org> | 2014-11-19 09:19:57 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2014-11-19 09:19:57 +0000 |
| commit | 5cd69085ed9d2494c70ae1831abb4ce5d4dca74e (patch) | |
| tree | e42bd94687d7ff803ef5fe2054088d6e0bea2627 /target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c | |
| parent | 0f47bf20deea97a781755501a75b2674b3d0335a (diff) | |
| download | master-187ad058-5cd69085ed9d2494c70ae1831abb4ce5d4dca74e.tar.gz master-187ad058-5cd69085ed9d2494c70ae1831abb4ce5d4dca74e.tar.bz2 master-187ad058-5cd69085ed9d2494c70ae1831abb4ce5d4dca74e.zip | |
ralink: fix tx vlan offload and hardware status
hardware status and tx vlan offload support on all targets
except rt5350. so i modify the IS_ENABLE condition only for
mt7621.
support mt7621 hardware status reference by SDK. but i don't
have mt7621. if not work just set mt7621 FE_REG_FE_COUNTER_BASE
to 0 to let software count.
Signed-off-by: michael lee <igvtee@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43303 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c')
| -rw-r--r-- | target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c index 1a40aff77b..ba1a170abc 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c @@ -55,6 +55,11 @@ #define MT7620_GDM1_TX_GBCNT (MT7620_REG_MIB_OFFSET + 0x300) #define MT7620_GDM2_TX_GBCNT (MT7620_GDM1_TX_GBCNT + 0x40) +#define MT7621_REG_MIB_OFFSET 0x2000 +#define MT7621_PPE_AC_BCNT0 (MT7621_REG_MIB_OFFSET + 0x00) +#define MT7621_GDM1_TX_GBCNT (MT7621_REG_MIB_OFFSET + 0x400) +#define MT7621_GDM2_TX_GBCNT (MT7621_GDM1_TX_GBCNT + 0x40) + #define GSW_REG_GDMA1_MAC_ADRL 0x508 #define GSW_REG_GDMA1_MAC_ADRH 0x50C @@ -90,7 +95,7 @@ static const u32 mt7621_reg_table[FE_REG_COUNT] = { [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE, [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS, [FE_REG_FE_DMA_VID_BASE] = MT7621_DMA_VID, - [FE_REG_FE_COUNTER_BASE] = MT7620_GDM1_TX_GBCNT, + [FE_REG_FE_COUNTER_BASE] = MT7621_GDM1_TX_GBCNT, [FE_REG_FE_RST_GL] = MT7621_FE_RST_GL, }; |