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author | John Crispin <blogic@openwrt.org> | 2013-04-03 09:58:44 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2013-04-03 09:58:44 +0000 |
commit | 84238ad24d5bdf6b95cc3d972908d699502764ab (patch) | |
tree | 6438279d1866fffb0c66b568f2ee3e64f2aa89b0 /target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c | |
parent | fd1af44d07b5c0eccd58bf24805810d2f0077936 (diff) | |
download | master-187ad058-84238ad24d5bdf6b95cc3d972908d699502764ab.tar.gz master-187ad058-84238ad24d5bdf6b95cc3d972908d699502764ab.tar.bz2 master-187ad058-84238ad24d5bdf6b95cc3d972908d699502764ab.zip |
[ramips] move files to files-3.7
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36161 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c')
-rw-r--r-- | target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c b/target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c new file mode 100644 index 0000000000..9fd7adb543 --- /dev/null +++ b/target/linux/ramips/files-3.7/arch/mips/ralink/rt288x/early_printk.c @@ -0,0 +1,30 @@ +/* + * Ralink RT288x SoC early printk support + * + * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/io.h> +#include <linux/serial_reg.h> + +#include <asm/addrspace.h> + +#include <asm/mach-ralink/rt288x_regs.h> + +#define UART_READ(r) \ + __raw_readl((void __iomem *)(KSEG1ADDR(RT2880_UART1_BASE) + 4 * (r))) + +#define UART_WRITE(r, v) \ + __raw_writel((v), (void __iomem *)(KSEG1ADDR(RT2880_UART1_BASE) + 4 * (r))) + +void prom_putchar(unsigned char ch) +{ + while (((UART_READ(UART_REG_LSR)) & UART_LSR_THRE) == 0); + UART_WRITE(UART_REG_TX, ch); + while (((UART_READ(UART_REG_LSR)) & UART_LSR_THRE) == 0); +} |