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authorJonas Gorski <jogo@openwrt.org>2015-02-27 17:40:17 +0000
committerJonas Gorski <jogo@openwrt.org>2015-02-27 17:40:17 +0000
commitaa4d5abef003bad1eea90560ab8a5d507a349de0 (patch)
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parentc5696515d1ae7d88c59291367198ed3a73d5de59 (diff)
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b53: fix mmap register read/writes > 32 bit
For bcm63xx integrated switches, broadcom changed the data endianess to match the system endianess. But this only applies to within one word, which causes 48/64 bit values to be still split into their "litte endian" groups. E.g. 48 bit values (with 5 being the most significant byte) aligned 0x00 ..01 or 0123 0x04 2345 45.. will become 0x00 ..10 resp. 3210 0x04 5432 54.. Likewise for 64 bit values. Signed-off-by: Jonas Gorski <jogo@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44568 3c298f89-4303-0410-b956-a3cf2f4a3e73
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