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author | John Crispin <blogic@openwrt.org> | 2010-12-12 22:57:16 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2010-12-12 22:57:16 +0000 |
commit | 3a8cab4295251305a2b8fba4f5ba3b9340915957 (patch) | |
tree | 24f859f8849a0d5180c1bef85c758ce70aa43c80 /target/linux/lantiq/patches/000-mips-bad-intctl.patch | |
parent | 30ce14b5fcdfbc1d739af351ab01e8d3e287f174 (diff) | |
download | master-187ad058-3a8cab4295251305a2b8fba4f5ba3b9340915957.tar.gz master-187ad058-3a8cab4295251305a2b8fba4f5ba3b9340915957.tar.bz2 master-187ad058-3a8cab4295251305a2b8fba4f5ba3b9340915957.zip |
[lantiq] adds new lantiq kernel. once the codebase is fully tested and know to be working on all the devices previously supported by ifxmips, we will drop ifxmips support.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24526 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches/000-mips-bad-intctl.patch')
-rw-r--r-- | target/linux/lantiq/patches/000-mips-bad-intctl.patch | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches/000-mips-bad-intctl.patch b/target/linux/lantiq/patches/000-mips-bad-intctl.patch new file mode 100644 index 0000000000..7c0f52db06 --- /dev/null +++ b/target/linux/lantiq/patches/000-mips-bad-intctl.patch @@ -0,0 +1,35 @@ +--- a/arch/mips/kernel/traps.c ++++ b/arch/mips/kernel/traps.c +@@ -1496,7 +1496,18 @@ void __cpuinit per_cpu_trap_init(void) + if (cpu_has_mips_r2) { + cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; + cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7; ++ ++ if (!cp0_compare_irq) ++ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; ++ + cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7; ++ ++ if (!cp0_perfcount_irq) ++ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ; ++ ++ if (arch_fixup_c0_irqs) ++ arch_fixup_c0_irqs(); ++ + if (cp0_perfcount_irq == cp0_compare_irq) + cp0_perfcount_irq = -1; + } else { +--- a/arch/mips/include/asm/irq.h ++++ b/arch/mips/include/asm/irq.h +@@ -133,9 +133,11 @@ extern void free_irqno(unsigned int irq) + * IE7. Since R2 their number has to be read from the c0_intctl register. + */ + #define CP0_LEGACY_COMPARE_IRQ 7 ++#define CP0_LEGACY_PERFCNT_IRQ 7 + + extern int cp0_compare_irq; + extern int cp0_compare_irq_shift; + extern int cp0_perfcount_irq; ++extern void __weak arch_fixup_c0_irqs(void); + + #endif /* _ASM_IRQ_H */ |