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author | Zoltan Herpai <wigyori@uid0.hu> | 2016-06-24 20:17:26 +0200 |
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committer | GitHub <noreply@github.com> | 2016-06-24 20:17:26 +0200 |
commit | 6eb05f9f38210bfd7cb667fab1b00e5ebd737556 (patch) | |
tree | 8adb7f0946f1c0f2fba4cc28999d915b167af464 /target/linux/lantiq/dts/VGV7519.dtsi | |
parent | 282b917e47d9ae5017e1e426face9b75cb7aabd0 (diff) | |
parent | 64de7165e5bce0d6f811795bc5a0a81165eb58ca (diff) | |
download | master-187ad058-6eb05f9f38210bfd7cb667fab1b00e5ebd737556.tar.gz master-187ad058-6eb05f9f38210bfd7cb667fab1b00e5ebd737556.tar.bz2 master-187ad058-6eb05f9f38210bfd7cb667fab1b00e5ebd737556.zip |
Merge pull request #12 from wigyori/master
update oxnas target, update ipq806x target, create trunk tag and update revisioning accordingly
Diffstat (limited to 'target/linux/lantiq/dts/VGV7519.dtsi')
-rw-r--r-- | target/linux/lantiq/dts/VGV7519.dtsi | 78 |
1 files changed, 27 insertions, 51 deletions
diff --git a/target/linux/lantiq/dts/VGV7519.dtsi b/target/linux/lantiq/dts/VGV7519.dtsi index 95de6e56e7..ad6393e12e 100644 --- a/target/linux/lantiq/dts/VGV7519.dtsi +++ b/target/linux/lantiq/dts/VGV7519.dtsi @@ -23,54 +23,44 @@ }; fpi@10000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "lantiq,fpi", "simple-bus"; - ranges = <0x0 0x10000000 0xEEFFFFF>; - reg = <0x10000000 0xEF00000>; - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "lantiq,localbus", "simple-bus"; + nor-boot@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>, <1 0x800000 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boardconfig: partition@40000 { + label = "board_config"; + reg = <0x40000 0x10000>; + read-only; + }; + }; + }; }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-xr9"; pinctrl-names = "default"; pinctrl-0 = <&state_default>; - interrupt-parent = <&icu0>; - interrupts = <166 135 66 40 41 42 38>; - - #gpio-cells = <2>; - gpio-controller; - reg = <0xE100B10 0xA0>; - state_default: pinmux { stp { lantiq,groups = "stp"; lantiq,function = "stp"; - }; - spi { - lantiq,groups = "spi_di", "spi_do", "spi_clk"; - lantiq,function = "spi"; + lantiq,open-drain = <0>; + lantiq,output = <1>; + lantiq,pull = <0>; }; mdio { lantiq,groups = "mdio"; lantiq,function = "mdio"; }; - gphy-leds_out { - lantiq,pins = "io7", "io44"; - lantiq,pull = <0>; - lantiq,output = <1>; - }; - stp_out { - lantiq,pins = "io4", "io5", "io6"; - lantiq,open-drain = <0>; - lantiq,output = <1>; - lantiq,pull = <0>; - }; pci-rst { lantiq,pins = "io21"; lantiq,open-drain = <0>; @@ -109,19 +99,7 @@ pci@E105400 { status = "okay"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - compatible = "lantiq,pci-xway"; - bus-range = <0x0 0x0>; - ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ - 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ - reg = <0x7000000 0x8000 /* config space */ - 0xE105400 0x400>; /* pci bridge */ lantiq,bus-clock = <33333333>; - /*lantiq,external-clock;*/ - lantiq,delay-hi = <0>; /* 0ns delay */ - lantiq,delay-lo = <0>; /* 0.0ns delay */ interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30 @@ -243,7 +221,8 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; - mac-address = [ 00 11 22 33 44 55 ]; + mtd-mac-address = <&boardconfig 0x16>; + lantiq,switch; ethernet@0 { compatible = "lantiq,xrx200-pdi-port"; @@ -276,8 +255,10 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; - mac-address = [ 00 11 22 33 44 56 ]; + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <2>; lantiq,wan; + ethernet@5 { compatible = "lantiq,xrx200-pdi-port"; reg = <5>; @@ -293,27 +274,22 @@ phy0: ethernet-phy@0 { reg = <0x0>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; - lantiq,c45-reg-init = <1 0 0 0>; }; phy1: ethernet-phy@1 { reg = <0x1>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; - lantiq,c45-reg-init = <1 0 0 0>; }; phy5: ethernet-phy@5 { reg = <0x5>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; - lantiq,c45-reg-init = <1 0 0 0>; }; phy11: ethernet-phy@11 { reg = <0x11>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; - lantiq,c45-reg-init = <1 0 0 0>; }; phy13: ethernet-phy@13 { reg = <0x13>; compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; - lantiq,c45-reg-init = <1 0 0 0>; }; }; }; |