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authorJohn Crispin <blogic@openwrt.org>2014-08-30 09:32:58 +0000
committerJohn Crispin <blogic@openwrt.org>2014-08-30 09:32:58 +0000
commita297ec8e13d10274155e0850228bb06c7648e541 (patch)
treea75e0d80b1664b748d679ea2e7f4797f58837703 /target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch
parent9f7cb06591148e3698ac731f7b8734e4d3d21b33 (diff)
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ipq806x: Add support for IPQ806x chip family
Patches are generated using the "format-patch" command from the following location: *https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base *rev=0771849495b4128cac2faf7d49c85c729fc48b20 Patches numbered 76/77/102/103 have already been integrated in 3.14.12, so they're not in this list. All these patches are either integrated are pending integration into kernel.org, therefore these patches should go away once the kernel gets upgraded to 3.16. Support is currently limited to AP148 board but can be extended to other platforms in the future. These changes do not cover ethernet connectivity. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42334 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch')
-rw-r--r--target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch55
1 files changed, 55 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch b/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch
new file mode 100644
index 0000000000..fc57727b37
--- /dev/null
+++ b/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch
@@ -0,0 +1,55 @@
+From 3a4fe9a3a4aff8b1f1c3685bc9b6adbe739d7367 Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Thu, 31 Oct 2013 18:20:30 -0700
+Subject: [PATCH 011/182] devicetree: bindings: Document qcom,kpss-acc
+
+The kpss acc binding describes the clock, reset, and power domain
+controller for a Krait CPU.
+
+Cc: <devicetree@vger.kernel.org>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Kumar Gala <galak@codeaurora.org>
+---
+ .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 30 ++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+
+diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+new file mode 100644
+index 0000000..1333db9
+--- /dev/null
++++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+@@ -0,0 +1,30 @@
++Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
++
++The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
++There is one ACC register region per CPU within the KPSS remapped region as
++well as an alias register region that remaps accesses to the ACC associated
++with the CPU accessing the region.
++
++PROPERTIES
++
++- compatible:
++ Usage: required
++ Value type: <string>
++ Definition: should be one of:
++ "qcom,kpss-acc-v1"
++ "qcom,kpss-acc-v2"
++
++- reg:
++ Usage: required
++ Value type: <prop-encoded-array>
++ Definition: the first element specifies the base address and size of
++ the register region. An optional second element specifies
++ the base address and size of the alias register region.
++
++Example:
++
++ clock-controller@2088000 {
++ compatible = "qcom,kpss-acc-v2";
++ reg = <0x02088000 0x1000>,
++ <0x02008000 0x1000>;
++ };
+--
+1.7.10.4
+