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| author | Hauke Mehrtens <hauke@openwrt.org> | 2013-12-26 23:22:31 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@openwrt.org> | 2013-12-26 23:22:31 +0000 |
| commit | cbfb4a3594a465308391e132114dabee50bc2e76 (patch) | |
| tree | bee4d94867e5e543c0dfdd933d746ae5e37ebbd0 /target/linux/generic/patches-3.10/771-bgmac-pending.patch | |
| parent | dc7849b9c7a517c0793f79c77e94c8104a5478c1 (diff) | |
| download | master-187ad058-cbfb4a3594a465308391e132114dabee50bc2e76.tar.gz master-187ad058-cbfb4a3594a465308391e132114dabee50bc2e76.tar.bz2 master-187ad058-cbfb4a3594a465308391e132114dabee50bc2e76.zip | |
kernel: bgmac: update patches
This updates the bgmac backport patch to the current upstream version
and adds some more patches mostly for BCM4707.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39165 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/generic/patches-3.10/771-bgmac-pending.patch')
| -rw-r--r-- | target/linux/generic/patches-3.10/771-bgmac-pending.patch | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/target/linux/generic/patches-3.10/771-bgmac-pending.patch b/target/linux/generic/patches-3.10/771-bgmac-pending.patch new file mode 100644 index 0000000000..42a5fe3110 --- /dev/null +++ b/target/linux/generic/patches-3.10/771-bgmac-pending.patch @@ -0,0 +1,78 @@ +--- a/drivers/net/ethernet/broadcom/bgmac.c ++++ b/drivers/net/ethernet/broadcom/bgmac.c +@@ -725,11 +725,9 @@ static void bgmac_phy_reset(struct bgmac + if (bgmac->phyaddr == BGMAC_PHY_NOREGS) + return; + +- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL, +- BGMAC_PHY_CTL_RESET); ++ bgmac_phy_write(bgmac, bgmac->phyaddr, MII_BMCR, BMCR_RESET); + udelay(100); +- if (bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) & +- BGMAC_PHY_CTL_RESET) ++ if (bgmac_phy_read(bgmac, bgmac->phyaddr, MII_BMCR) & BMCR_RESET) + bgmac_err(bgmac, "PHY reset failed\n"); + bgmac_phy_init(bgmac); + } +@@ -1200,27 +1198,11 @@ static int bgmac_set_mac_address(struct + static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) + { + struct bgmac *bgmac = netdev_priv(net_dev); +- struct mii_ioctl_data *data = if_mii(ifr); + +- switch (cmd) { +- case SIOCGMIIPHY: +- data->phy_id = bgmac->phyaddr; +- /* fallthru */ +- case SIOCGMIIREG: +- if (!netif_running(net_dev)) +- return -EAGAIN; +- data->val_out = bgmac_phy_read(bgmac, data->phy_id, +- data->reg_num & 0x1f); +- return 0; +- case SIOCSMIIREG: +- if (!netif_running(net_dev)) +- return -EAGAIN; +- bgmac_phy_write(bgmac, data->phy_id, data->reg_num & 0x1f, +- data->val_in); +- return 0; +- default: +- return -EOPNOTSUPP; +- } ++ if (!netif_running(net_dev)) ++ return -EINVAL; ++ ++ return phy_mii_ioctl(bgmac->phy_dev, ifr, cmd); + } + + static const struct net_device_ops bgmac_netdev_ops = { +--- a/drivers/net/ethernet/broadcom/bgmac.h ++++ b/drivers/net/ethernet/broadcom/bgmac.h +@@ -220,27 +220,6 @@ + #define BGMAC_RX_STATUS 0xb38 + #define BGMAC_TX_STATUS 0xb3c + +-#define BGMAC_PHY_CTL 0x00 +-#define BGMAC_PHY_CTL_SPEED_MSB 0x0040 +-#define BGMAC_PHY_CTL_DUPLEX 0x0100 /* duplex mode */ +-#define BGMAC_PHY_CTL_RESTART 0x0200 /* restart autonegotiation */ +-#define BGMAC_PHY_CTL_ANENAB 0x1000 /* enable autonegotiation */ +-#define BGMAC_PHY_CTL_SPEED 0x2000 +-#define BGMAC_PHY_CTL_LOOP 0x4000 /* loopback */ +-#define BGMAC_PHY_CTL_RESET 0x8000 /* reset */ +-/* Helpers */ +-#define BGMAC_PHY_CTL_SPEED_10 0 +-#define BGMAC_PHY_CTL_SPEED_100 BGMAC_PHY_CTL_SPEED +-#define BGMAC_PHY_CTL_SPEED_1000 BGMAC_PHY_CTL_SPEED_MSB +-#define BGMAC_PHY_ADV 0x04 +-#define BGMAC_PHY_ADV_10HALF 0x0020 /* advertise 10MBits/s half duplex */ +-#define BGMAC_PHY_ADV_10FULL 0x0040 /* advertise 10MBits/s full duplex */ +-#define BGMAC_PHY_ADV_100HALF 0x0080 /* advertise 100MBits/s half duplex */ +-#define BGMAC_PHY_ADV_100FULL 0x0100 /* advertise 100MBits/s full duplex */ +-#define BGMAC_PHY_ADV2 0x09 +-#define BGMAC_PHY_ADV2_1000HALF 0x0100 /* advertise 1000MBits/s half duplex */ +-#define BGMAC_PHY_ADV2_1000FULL 0x0200 /* advertise 1000MBits/s full duplex */ +- + /* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */ + #define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004 /* PHY Clock Enable */ + #define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008 /* PHY Reset */ |