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author | Jonas Gorski <jogo@openwrt.org> | 2012-07-31 14:27:47 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2012-07-31 14:27:47 +0000 |
commit | 9f30da9d337f5de6976c42c7ed413d9efa2efe90 (patch) | |
tree | 3142a63e487034267a55083403a2870f7a1b4991 /target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch | |
parent | 3b359071252259af538e6bd4a99fd171d2e073b2 (diff) | |
download | master-187ad058-9f30da9d337f5de6976c42c7ed413d9efa2efe90.tar.gz master-187ad058-9f30da9d337f5de6976c42c7ed413d9efa2efe90.tar.bz2 master-187ad058-9f30da9d337f5de6976c42c7ed413d9efa2efe90.zip |
bcm63xx: Add nb6 support (BCM6362 SoC base boards)
Signed-off-by: Miguel GAIO <miguel.gaio@efixo.com>
Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
[jonas.gorski@gmail.com: add network config for nb6, make switch fix a
platform patch]
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32924 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch b/target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch new file mode 100644 index 0000000000..285f3f744e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/802-rtl8367r_fix_RGMII_support.patch @@ -0,0 +1,30 @@ +From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001 +From: Miguel GAIO <miguel.gaio@efixo.com> +Date: Fri, 6 Jul 2012 14:12:33 +0200 +Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support + +--- + drivers/net/phy/rtl8367.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +--- a/drivers/net/phy/rtl8367.c ++++ b/drivers/net/phy/rtl8367.c +@@ -144,6 +144,10 @@ + #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1 + #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7 + ++#define RTL8367_PHY_AD_REG 0x130f ++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5 ++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0 ++ + #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x)) + #define RTL8367_DI_FORCE_MODE BIT(12) + #define RTL8367_DI_FORCE_NWAY BIT(7) +@@ -892,6 +896,7 @@ static int rtl8367_extif_set_mode(struct + case RTL8367_EXTIF_MODE_RGMII_33V: + REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367); + REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777); ++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0); + break; + + case RTL8367_EXTIF_MODE_TMII_MAC: |