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author | Felix Fietkau <nbd@openwrt.org> | 2015-03-28 13:21:09 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2015-03-28 13:21:09 +0000 |
commit | f01fd8e50b189be59e546e9a9dcb2db71e98682f (patch) | |
tree | bacf0b240c515c0e4f709fdc2fcb3b60c76d990b /target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch | |
parent | 35996331c3f42e69eace5b57fa5e2e965c026a12 (diff) | |
download | master-187ad058-f01fd8e50b189be59e546e9a9dcb2db71e98682f.tar.gz master-187ad058-f01fd8e50b189be59e546e9a9dcb2db71e98682f.tar.bz2 master-187ad058-f01fd8e50b189be59e546e9a9dcb2db71e98682f.zip |
brcm63xx: remove linux 3.14 support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45089 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch | 63 |
1 files changed, 0 insertions, 63 deletions
diff --git a/target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch b/target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch deleted file mode 100644 index 2b19600776..0000000000 --- a/target/linux/brcm63xx/patches-3.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski <jogo@openwrt.org> -Date: Sun, 22 Dec 2013 13:25:25 +0100 -Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot - -Some bootloaders leave the flash access in an invalid state with dual -read enabled; fix it by disabling it and falling back to simple fast -reads. - -Signed-off-by: Jonas Gorski <jogo@openwrt.org> ---- - arch/mips/bcm63xx/dev-flash.c | 36 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - ---- a/arch/mips/bcm63xx/dev-flash.c -+++ b/arch/mips/bcm63xx/dev-flash.c -@@ -110,9 +110,46 @@ static int __init bcm63xx_detect_flash_t - } - } - -+#define HSSPI_FLASH_CTRL_REG 0x14 -+#define FLASH_CTRL_READ_OPCODE_MASK 0xff -+#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8) -+#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8) -+#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8) -+#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8) -+#define FLASH_CTRL_MB_EN (1 << 23) -+ - void __init bcm63xx_flash_detect(void) - { - flash_type = bcm63xx_detect_flash_type(); -+ -+ /* reduce flash mapping to single i/o reads for safety */ -+ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL && -+ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || -+ BCMCPU_IS_63268())) { -+ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG); -+ -+ if (!(val & FLASH_CTRL_MB_EN)) -+ return; -+ -+ val &= ~FLASH_CTRL_MB_EN; -+ val &= ~FLASH_CTRL_READ_OPCODE_MASK; -+ -+ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) { -+ case FLASH_CTRL_ADDR_BYTES_3: -+ val |= 0x0b; /* OPCODE_FAST_READ */ -+ break; -+ case FLASH_CTRL_ADDR_BYTES_4: -+ val |= 0x0c; /* OPCODE_FAST_READ_4B */ -+ break; -+ case FLASH_CTRL_ADDR_BYTES_2: -+ default: -+ pr_warn("unsupported address byte mode (%x), not fixing up\n", -+ val & FLASH_CTRL_ADDR_BYTES_MASK); -+ return; -+ } -+ -+ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG); -+ } - } - - int __init bcm63xx_flash_register(void) |