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| author | Jonas Gorski <jogo@openwrt.org> | 2014-01-19 13:46:05 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2014-01-19 13:46:05 +0000 |
| commit | 97174e266fee6435c065f227804c8d5bf2fc0ead (patch) | |
| tree | 5292c5acac698743b02aa383c04bf95f96caad58 /target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | |
| parent | bb35646894f86d3e62d7e16b9221ec0bd28ec25a (diff) | |
| download | master-187ad058-97174e266fee6435c065f227804c8d5bf2fc0ead.tar.gz master-187ad058-97174e266fee6435c065f227804c8d5bf2fc0ead.tar.bz2 master-187ad058-97174e266fee6435c065f227804c8d5bf2fc0ead.zip | |
brcm63xx: add USB support for BCM63268
Add and enable USB support for the BCM63268 family of SoCs.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39323 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch index a740d4d1b5..76a8754ec5 100644 --- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch +++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -115,7 +115,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> return -ENODEV; --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -824,6 +824,7 @@ +@@ -827,6 +827,7 @@ #define GPIO_STRAPBUS_REG 0x40 #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) @@ -123,8 +123,8 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 #define STRAPBUS_6368_BOOT_SEL_NAND 0 #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 -@@ -1682,6 +1683,7 @@ - #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) +@@ -1697,6 +1698,7 @@ + #define IDDQ_CTRL_63268_USBH (1 << 4) #define MISC_STRAPBUS_6328_REG 0x240 +#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4) |