aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
diff options
context:
space:
mode:
authorJonas Gorski <jogo@openwrt.org>2014-08-01 21:56:35 +0000
committerJonas Gorski <jogo@openwrt.org>2014-08-01 21:56:35 +0000
commit6354265168e5c7b593c6579c3a211cd94e914f94 (patch)
tree88a9fb14dbdecfde63ca70c49860b2269f0f3886 /target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
parent9762c605fe5fe106010f441c9daf42b08c1fcad8 (diff)
downloadmaster-187ad058-6354265168e5c7b593c6579c3a211cd94e914f94.tar.gz
master-187ad058-6354265168e5c7b593c6579c3a211cd94e914f94.tar.bz2
master-187ad058-6354265168e5c7b593c6579c3a211cd94e914f94.zip
brcm63xx: switch to 3.14
Now that BB is branched off, we can now switch to 3.14 and start breaking stuff again. Signed-off-by: Jonas Gorski <jogo@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41941 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch77
1 files changed, 0 insertions, 77 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
deleted file mode 100644
index b15cc37c35..0000000000
--- a/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 994ed2c168ce27483724cd0c387f752d1ccd30e7 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 20/45] MIPS: BCM63XX: add a new cpu variant helper
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
-+static u32 bcm63xx_cpu_variant __read_mostly;
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+u32 bcm63xx_get_cpu_variant(void)
-+{
-+ return bcm63xx_cpu_variant;
-+}
-+
-+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
-+
- u8 bcm63xx_get_cpu_rev(void)
- {
- return bcm63xx_cpu_rev;
-@@ -332,6 +341,7 @@ void __init bcm63xx_cpu_init(void)
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -19,6 +19,7 @@
- #define BCM6368_CPU_ID 0x6368
-
- void __init bcm63xx_cpu_init(void);
-+u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
-@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-
-+#define BCMCPU_VARIANT_IS_3368() \
-+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6328() \
-+ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6338() \
-+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6345() \
-+ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6348() \
-+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6358() \
-+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6362() \
-+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6368() \
-+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
- * address of these sets do change.