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author | Gabor Juhos <juhosg@openwrt.org> | 2013-08-23 17:31:04 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2013-08-23 17:31:04 +0000 |
commit | 1b2ea64f5ab6aa812469a4917d7e0b849e5e3f7d (patch) | |
tree | 411e0252ffed6d9792ea2852897e688c0a1ac1eb /target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch | |
parent | e92011ca0082948a7fe22e3760ba4593ee53f47b (diff) | |
download | master-187ad058-1b2ea64f5ab6aa812469a4917d7e0b849e5e3f7d.tar.gz master-187ad058-1b2ea64f5ab6aa812469a4917d7e0b849e5e3f7d.tar.bz2 master-187ad058-1b2ea64f5ab6aa812469a4917d7e0b849e5e3f7d.zip |
kernel: update 3.10 to 3.10.9
Also refresh 3.10 patches.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37832 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch b/target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch index 75a4bcf8d5..e33d94dc0c 100644 --- a/target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch +++ b/target/linux/brcm63xx/patches-3.10/104-MIPS-bmips-merge-CPU-options-into-one-option.patch @@ -17,7 +17,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -129,6 +129,7 @@ config BCM63XX +@@ -130,6 +130,7 @@ config BCM63XX select DMA_NONCOHERENT select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 @@ -25,7 +25,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348 select NR_CPUS_DEFAULT_2 select SYS_SUPPORTS_32BIT_KERNEL -@@ -1447,41 +1448,21 @@ config CPU_CAVIUM_OCTEON +@@ -1453,41 +1454,21 @@ config CPU_CAVIUM_OCTEON can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. Full details can be found at http://www.caviumnetworks.com. @@ -81,7 +81,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> config CPU_XLR bool "Netlogic XLR SoC" -@@ -1562,14 +1543,25 @@ config CPU_LOONGSON1 +@@ -1568,14 +1549,25 @@ config CPU_LOONGSON1 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM @@ -114,7 +114,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> config SYS_HAS_CPU_LOONGSON2E bool -@@ -1643,6 +1635,9 @@ config SYS_HAS_CPU_SB1 +@@ -1649,6 +1641,9 @@ config SYS_HAS_CPU_SB1 config SYS_HAS_CPU_CAVIUM_OCTEON bool |