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| author | Florian Fainelli <florian@openwrt.org> | 2009-08-06 20:33:42 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2009-08-06 20:33:42 +0000 |
| commit | 033116d210fe57d0629c018ba356c3f91d8eca76 (patch) | |
| tree | 21fa5742f403561650b744046ccb29503389cbaf /target/linux/brcm63xx/files/arch | |
| parent | 25ee9c1d6b2c15a2da3da9cdbf8cfd2f455e8099 (diff) | |
| download | master-187ad058-033116d210fe57d0629c018ba356c3f91d8eca76.tar.gz master-187ad058-033116d210fe57d0629c018ba356c3f91d8eca76.tar.bz2 master-187ad058-033116d210fe57d0629c018ba356c3f91d8eca76.zip | |
[brcm63xx] bcm6345 fixes from AndyI
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17153 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/files/arch')
| -rw-r--r-- | target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 | ||||
| -rw-r--r-- | target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c index c61438e366..4551ef613d 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -789,7 +789,9 @@ int __init board_register_devices(void) bcm63xx_uart_register(); bcm63xx_wdt_register(); - bcm63xx_spi_register(); + + if (!BCMCPU_IS_6345()) + bcm63xx_spi_register(); if (board.has_pccard) bcm63xx_pcmcia_register(); diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c index 5b380ef7b8..937c830b91 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c @@ -95,16 +95,18 @@ static const unsigned long bcm96345_regs_base[] = { [RSET_UART0] = BCM_6345_UART0_BASE, [RSET_GPIO] = BCM_6345_GPIO_BASE, [RSET_SPI] = BCM_6345_SPI_BASE, + [RSET_UDC0] = BCM_6345_UDC0_BASE, [RSET_OHCI0] = BCM_6345_OHCI0_BASE, [RSET_OHCI_PRIV] = BCM_6345_OHCI_PRIV_BASE, [RSET_USBH_PRIV] = BCM_6345_USBH_PRIV_BASE, - [RSET_UDC0] = BCM_6345_UDC0_BASE, [RSET_MPI] = BCM_6345_MPI_BASE, [RSET_PCMCIA] = BCM_6345_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6345_SDRAM_BASE, [RSET_DSL] = BCM_6345_DSL_BASE, [RSET_ENET0] = BCM_6345_ENET0_BASE, + [RSET_ENET1] = BCM_6345_ENET1_BASE, [RSET_ENETDMA] = BCM_6345_ENETDMA_BASE, + [RSET_EHCI0] = BCM_6345_EHCI0_BASE, + [RSET_SDRAM] = BCM_6345_SDRAM_BASE, [RSET_MEMC] = BCM_6345_MEMC_BASE, [RSET_DDR] = BCM_6345_DDR_BASE, }; |