kernel: bgmac: move bgmac patches already applied in mainline kernel to generic

The bgmac driver will be used on the brcm47xx and the bcm53xx target. 
These are only the patches already applied in current net-next/master
branch.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38288 3c298f89-4303-0410-b956-a3cf2f4a3e73

5 files changed, 0 insertions, 247 deletions

diff --git a/target/linux/brcm47xx/patches-3.10/710-bgmac_fix_internal_switch_initialization.patch b/target/linux/brcm47xx/patches-3.10/710-bgmac_fix_internal_switch_initialization.patch
deleted file mode 100644
index 8601888498..0000000000
--- a/target/linux/brcm47xx/patches-3.10/710-bgmac_fix_internal_switch_initialization.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-bgmac: fix internal switch initialization
-
-Some devices (BCM4749, BCM5357, BCM53572) have internal switch that
-requires initialization. We already have code for this, but because
-of the typo in code it was never working. This resulted in network not
-working for some routers and possibility of soft-bricking them.
-
-Use correct bit for switch initialization and fix typo in the define.
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-
---- a/drivers/net/ethernet/broadcom/bgmac.c
-+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -908,7 +908,7 @@ static void bgmac_chip_reset(struct bgma
- 		struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
- 		u8 et_swtype = 0;
- 		u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
--			     BGMAC_CHIPCTL_1_IF_TYPE_RMII;
-+			     BGMAC_CHIPCTL_1_IF_TYPE_MII;
- 		char buf[2];
- 
- 		if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
---- a/drivers/net/ethernet/broadcom/bgmac.h
-+++ b/drivers/net/ethernet/broadcom/bgmac.h
-@@ -333,7 +333,7 @@
- 
- #define BGMAC_CHIPCTL_1_IF_TYPE_MASK		0x00000030
- #define BGMAC_CHIPCTL_1_IF_TYPE_RMII		0x00000000
--#define BGMAC_CHIPCTL_1_IF_TYPE_MI		0x00000010
-+#define BGMAC_CHIPCTL_1_IF_TYPE_MII		0x00000010
- #define BGMAC_CHIPCTL_1_IF_TYPE_RGMII		0x00000020
- #define BGMAC_CHIPCTL_1_SW_TYPE_MASK		0x000000C0
- #define BGMAC_CHIPCTL_1_SW_TYPE_EPHY		0x00000000
diff --git a/target/linux/brcm47xx/patches-3.10/711-bgmac_fix_parsing_of_et_swtype.patch b/target/linux/brcm47xx/patches-3.10/711-bgmac_fix_parsing_of_et_swtype.patch
deleted file mode 100644
index 21342ffd80..0000000000
--- a/target/linux/brcm47xx/patches-3.10/711-bgmac_fix_parsing_of_et_swtype.patch
+++ /dev/null
@@ -1,14 +0,0 @@
---- a/drivers/net/ethernet/broadcom/bgmac.c
-+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -909,9 +909,9 @@ static void bgmac_chip_reset(struct bgma
- 		u8 et_swtype = 0;
- 		u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
- 			     BGMAC_CHIPCTL_1_IF_TYPE_MII;
--		char buf[2];
-+		char buf[4];
- 
--		if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
-+		if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
- 			if (kstrtou8(buf, 0, &et_swtype))
- 				bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n",
- 					  buf);
diff --git a/target/linux/brcm47xx/patches-3.10/712-bgmac_implement_unaligned_addressing.patch b/target/linux/brcm47xx/patches-3.10/712-bgmac_implement_unaligned_addressing.patch
deleted file mode 100644
index 939ae114bb..0000000000
--- a/target/linux/brcm47xx/patches-3.10/712-bgmac_implement_unaligned_addressing.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-bgmac: implement unaligned addressing for DMA rings that support it
-
-This is important patch for new devices that support unaligned
-addressing. That devices suffer from the backward-compatibility bug in
-DMA engine. In theory we should be able to use old mechanism, but in
-practice DMA address seems to be randomly copied into status register
-when hardware reaches end of a ring. This breaks reading slot number
-from status register and we can't use DMA anymore.
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-
---- a/drivers/net/ethernet/broadcom/bgmac.c
-+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -157,6 +157,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
- 	if (++ring->end >= BGMAC_TX_RING_SLOTS)
- 		ring->end = 0;
- 	bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX,
-+		    ring->index_base +
- 		    ring->end * sizeof(struct bgmac_dma_desc));
- 
- 	/* Always keep one slot free to allow detecting bugged calls. */
-@@ -181,6 +182,8 @@ static void bgmac_dma_tx_free(struct bgm
- 	/* The last slot that hardware didn't consume yet */
- 	empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
- 	empty_slot &= BGMAC_DMA_TX_STATDPTR;
-+	empty_slot -= ring->index_base;
-+	empty_slot &= BGMAC_DMA_TX_STATDPTR;
- 	empty_slot /= sizeof(struct bgmac_dma_desc);
- 
- 	while (ring->start != empty_slot) {
-@@ -274,6 +277,8 @@ static int bgmac_dma_rx_read(struct bgma
- 
- 	end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);
- 	end_slot &= BGMAC_DMA_RX_STATDPTR;
-+	end_slot -= ring->index_base;
-+	end_slot &= BGMAC_DMA_RX_STATDPTR;
- 	end_slot /= sizeof(struct bgmac_dma_desc);
- 
- 	ring->end = end_slot;
-@@ -418,9 +423,6 @@ static int bgmac_dma_alloc(struct bgmac
- 		ring = &bgmac->tx_ring[i];
- 		ring->num_slots = BGMAC_TX_RING_SLOTS;
- 		ring->mmio_base = ring_base[i];
--		if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_TX))
--			bgmac_warn(bgmac, "TX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
--				   ring->mmio_base);
- 
- 		/* Alloc ring of descriptors */
- 		size = ring->num_slots * sizeof(struct bgmac_dma_desc);
-@@ -435,6 +437,13 @@ static int bgmac_dma_alloc(struct bgmac
- 		if (ring->dma_base & 0xC0000000)
- 			bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
- 
-+		ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
-+						      BGMAC_DMA_RING_TX);
-+		if (ring->unaligned)
-+			ring->index_base = lower_32_bits(ring->dma_base);
-+		else
-+			ring->index_base = 0;
-+
- 		/* No need to alloc TX slots yet */
- 	}
- 
-@@ -444,9 +453,6 @@ static int bgmac_dma_alloc(struct bgmac
- 		ring = &bgmac->rx_ring[i];
- 		ring->num_slots = BGMAC_RX_RING_SLOTS;
- 		ring->mmio_base = ring_base[i];
--		if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_RX))
--			bgmac_warn(bgmac, "RX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
--				   ring->mmio_base);
- 
- 		/* Alloc ring of descriptors */
- 		size = ring->num_slots * sizeof(struct bgmac_dma_desc);
-@@ -462,6 +468,13 @@ static int bgmac_dma_alloc(struct bgmac
- 		if (ring->dma_base & 0xC0000000)
- 			bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
- 
-+		ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
-+						      BGMAC_DMA_RING_RX);
-+		if (ring->unaligned)
-+			ring->index_base = lower_32_bits(ring->dma_base);
-+		else
-+			ring->index_base = 0;
-+
- 		/* Alloc RX slots */
- 		for (j = 0; j < ring->num_slots; j++) {
- 			err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
-@@ -489,12 +502,14 @@ static void bgmac_dma_init(struct bgmac
- 	for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
- 		ring = &bgmac->tx_ring[i];
- 
--		/* We don't implement unaligned addressing, so enable first */
--		bgmac_dma_tx_enable(bgmac, ring);
-+		if (!ring->unaligned)
-+			bgmac_dma_tx_enable(bgmac, ring);
- 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
- 			    lower_32_bits(ring->dma_base));
- 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI,
- 			    upper_32_bits(ring->dma_base));
-+		if (ring->unaligned)
-+			bgmac_dma_tx_enable(bgmac, ring);
- 
- 		ring->start = 0;
- 		ring->end = 0;	/* Points the slot that should *not* be read */
-@@ -505,12 +520,14 @@ static void bgmac_dma_init(struct bgmac
- 
- 		ring = &bgmac->rx_ring[i];
- 
--		/* We don't implement unaligned addressing, so enable first */
--		bgmac_dma_rx_enable(bgmac, ring);
-+		if (!ring->unaligned)
-+			bgmac_dma_rx_enable(bgmac, ring);
- 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
- 			    lower_32_bits(ring->dma_base));
- 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
- 			    upper_32_bits(ring->dma_base));
-+		if (ring->unaligned)
-+			bgmac_dma_rx_enable(bgmac, ring);
- 
- 		for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
- 		     j++, dma_desc++) {
-@@ -531,6 +548,7 @@ static void bgmac_dma_init(struct bgmac
- 		}
- 
- 		bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX,
-+			    ring->index_base +
- 			    ring->num_slots * sizeof(struct bgmac_dma_desc));
- 
- 		ring->start = 0;
---- a/drivers/net/ethernet/broadcom/bgmac.h
-+++ b/drivers/net/ethernet/broadcom/bgmac.h
-@@ -384,6 +384,8 @@ struct bgmac_dma_ring {
- 	u16 mmio_base;
- 	struct bgmac_dma_desc *cpu_base;
- 	dma_addr_t dma_base;
-+	u32 index_base; /* Used for unaligned rings only, otherwise 0 */
-+	bool unaligned;
- 
- 	struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS];
- };
diff --git a/target/linux/brcm47xx/patches-3.10/740-bgmac-add-support-for-Byte-Queue-Limits.patch b/target/linux/brcm47xx/patches-3.10/740-bgmac-add-support-for-Byte-Queue-Limits.patch
deleted file mode 100644
index 68d1bc9f6b..0000000000
--- a/target/linux/brcm47xx/patches-3.10/740-bgmac-add-support-for-Byte-Queue-Limits.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From: Hauke Mehrtens <hauke@hauke-m.de>
-bgmac: add support for Byte Queue Limits
-
---- a/drivers/net/ethernet/broadcom/bgmac.c
-+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -178,6 +178,7 @@ static void bgmac_dma_tx_free(struct bgm
- 	struct device *dma_dev = bgmac->core->dma_dev;
- 	int empty_slot;
- 	bool freed = false;
-+	unsigned bytes_compl = 0, pkts_compl = 0;
- 
- 	/* The last slot that hardware didn't consume yet */
- 	empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
-@@ -195,6 +196,9 @@ static void bgmac_dma_tx_free(struct bgm
- 					 slot->skb->len, DMA_TO_DEVICE);
- 			slot->dma_addr = 0;
- 
-+			bytes_compl += slot->skb->len;
-+			pkts_compl++;
-+
- 			/* Free memory! :) */
- 			dev_kfree_skb(slot->skb);
- 			slot->skb = NULL;
-@@ -208,6 +212,8 @@ static void bgmac_dma_tx_free(struct bgm
- 		freed = true;
- 	}
- 
-+	netdev_completed_queue(bgmac->net_dev, pkts_compl, bytes_compl);
-+
- 	if (freed && netif_queue_stopped(bgmac->net_dev))
- 		netif_wake_queue(bgmac->net_dev);
- }
-@@ -987,6 +993,8 @@ static void bgmac_chip_reset(struct bgma
- 		bgmac_set(bgmac, BGMAC_PHY_CNTL, BGMAC_PC_MTE);
- 	bgmac_miiconfig(bgmac);
- 	bgmac_phy_init(bgmac);
-+	
-+	netdev_reset_queue(bgmac->net_dev);
- 
- 	bgmac->int_status = 0;
- }
-@@ -1198,6 +1206,8 @@ static netdev_tx_t bgmac_start_xmit(stru
- 	struct bgmac *bgmac = netdev_priv(net_dev);
- 	struct bgmac_dma_ring *ring;
- 
-+	netdev_sent_queue(net_dev, skb->len);
-+
- 	/* No QOS support yet */
- 	ring = &bgmac->tx_ring[0];
- 	return bgmac_dma_tx_add(bgmac, ring, skb);
diff --git a/target/linux/brcm47xx/patches-3.10/770-bgmac-phylib.patch b/target/linux/brcm47xx/patches-3.10/770-bgmac-phylib.patch
index 13a7ea5d3a..50aaeaa14d 100644
--- a/target/linux/brcm47xx/patches-3.10/770-bgmac-phylib.patch
+++ b/target/linux/brcm47xx/patches-3.10/770-bgmac-phylib.patch
@@ -1,13 +1,3 @@
---- a/drivers/net/ethernet/broadcom/Kconfig
-+++ b/drivers/net/ethernet/broadcom/Kconfig
-@@ -133,6 +133,7 @@ config BNX2X_SRIOV
- config BGMAC
- 	tristate "BCMA bus GBit core support"
- 	depends on BCMA_HOST_SOC && HAS_DMA
-+	select PHYLIB
- 	---help---
- 	  This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
- 	  They can be found on BCM47xx SoCs and provide gigabit ethernet.
 --- a/drivers/net/ethernet/broadcom/bgmac.c
 +++ b/drivers/net/ethernet/broadcom/bgmac.c
 @@ -1229,27 +1229,14 @@ static int bgmac_set_mac_address(struct