brcm47xx: update watchdog driver

This watchdog driver should work with SoC having a PMU.

This fixes #11720.


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34323 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 93 insertions, 0 deletions

diff --git a/target/linux/brcm47xx/patches-3.6/547-bcma-add-methods-for-watchdog-driver.patch b/target/linux/brcm47xx/patches-3.6/547-bcma-add-methods-for-watchdog-driver.patch
new file mode 100644
index 0000000000..1be2476d39
--- /dev/null
+++ b/target/linux/brcm47xx/patches-3.6/547-bcma-add-methods-for-watchdog-driver.patch
@@ -0,0 +1,93 @@
+--- a/drivers/bcma/driver_chipcommon.c
++++ b/drivers/bcma/driver_chipcommon.c
+@@ -10,6 +10,7 @@
+  */
+ 
+ #include "bcma_private.h"
++#include <linux/bcm47xx_wdt.h>
+ #include <linux/export.h>
+ #include <linux/bcma/bcma.h>
+ 
+@@ -52,6 +53,39 @@ static u32 bcma_chipco_watchdog_get_max_
+ 		return (1 << nb) - 1;
+ }
+ 
++static u32 bcma_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt,
++					      u32 ticks)
++{
++	struct bcma_drv_cc *cc = bcm47xx_wdt_get_drvdata(wdt);
++
++	return bcma_chipco_watchdog_timer_set(cc, ticks);
++}
++
++static u32 bcma_chipco_watchdog_timer_set_ms_wdt(struct bcm47xx_wdt *wdt,
++						 u32 ms)
++{
++	struct bcma_drv_cc *cc = bcm47xx_wdt_get_drvdata(wdt);
++	u32 ticks;
++
++	ticks = bcma_chipco_watchdog_timer_set(cc, cc->ticks_per_ms * ms);
++	return ticks / cc->ticks_per_ms;
++}
++
++static int bcma_chipco_watchdog_ticks_per_ms(struct bcma_drv_cc *cc)
++{
++	struct bcma_bus *bus = cc->core->bus;
++
++	if (cc->capabilities & BCMA_CC_CAP_PMU) {
++		if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706)
++			/* 4706 CC and PMU watchdogs are clocked at 1/4 of ALP clock */
++			return bcma_chipco_alp_clock(cc) / 4000;
++		else
++			/* based on 32KHz ILP clock */
++			return 32;
++	} else {
++		return bcma_chipco_alp_clock(cc) / 1000;
++	}
++}
+ 
+ void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc)
+ {
+@@ -102,12 +136,13 @@ void bcma_core_chipcommon_init(struct bc
+ 	}
+ 
+ 	spin_lock_init(&cc->gpio_lock);
++	cc->ticks_per_ms = bcma_chipco_watchdog_ticks_per_ms(cc);
+ 
+ 	cc->setup_done = true;
+ }
+ 
+ /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
+-void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks)
++u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks)
+ {
+ 	u32 maxt;
+ 	enum bcma_clkmode clkmode;
+@@ -126,6 +161,7 @@ void bcma_chipco_watchdog_timer_set(stru
+ 			ticks = maxt;
+ 		bcma_cc_write32(cc, BCMA_CC_WATCHDOG, ticks);
+ 	}
++	return ticks;
+ }
+ 
+ void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value)
+--- a/include/linux/bcma/bcma_driver_chipcommon.h
++++ b/include/linux/bcma/bcma_driver_chipcommon.h
+@@ -554,6 +554,7 @@ struct bcma_drv_cc {
+ 
+ 	/* Lock for GPIO register access. */
+ 	spinlock_t gpio_lock;
++	u32 ticks_per_ms;
+ };
+ 
+ /* Register access */
+@@ -577,8 +578,7 @@ extern void bcma_chipco_resume(struct bc
+ 
+ void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
+ 
+-extern void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc,
+-					  u32 ticks);
++extern u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks);
+ 
+ void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value);
+