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authorFlorian Fainelli <florian@openwrt.org>2014-09-27 19:10:51 +0000
committerFlorian Fainelli <florian@openwrt.org>2014-09-27 19:10:51 +0000
commitc65ec1aa8fbcbafdc568c4206286ca77f3234caf (patch)
tree563323b952b96b10d5cca5b124de2cd9266259b0 /target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch
parent7771ecddf3b18914aa513ef818042516f61e79a9 (diff)
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brcm2708: update 3.10 patches with raspberrypi/rpi-3.10.y of 27 Apr. 2014
Update the 3.10 rasperry patches by rebasing raspberry/rpi-3.10-y against linux-stable/v3.10.49. Signed-off-by: Florian Fainelli <florian@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42678 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch')
-rw-r--r--target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch15
1 files changed, 10 insertions, 5 deletions
diff --git a/target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch b/target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch
index c6814e2958..c36f92c3f9 100644
--- a/target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch
+++ b/target/linux/brcm2708/patches-3.10/0078-dwc_otg-mask-correct-interrupts-after-transaction-er.patch
@@ -1,7 +1,7 @@
-From cb902630ae7ef709c8f40ca3f506cf5052077701 Mon Sep 17 00:00:00 2001
+From 5608eaff0f301e9bf73998da020644f1673b66e4 Mon Sep 17 00:00:00 2001
From: P33M <P33M@github.com>
Date: Sat, 13 Jul 2013 20:41:26 +0100
-Subject: [PATCH 078/174] dwc_otg: mask correct interrupts after transaction
+Subject: [PATCH 078/196] dwc_otg: mask correct interrupts after transaction
error recovery
The dwc_otg driver will unmask certain interrupts on a transaction
@@ -17,9 +17,11 @@ from being generated if the FIQ is enabled.
drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
+diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
+index e8b4d35..27b673f 100644
--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
-@@ -1851,7 +1851,11 @@ static int32_t handle_hc_nak_intr(dwc_ot
+@@ -1851,7 +1851,11 @@ static int32_t handle_hc_nak_intr(dwc_otg_hcd_t * hcd,
* transfers in DMA mode for the sole purpose of
* resetting the error count after a transaction error
* occurs. The core will continue transferring data.
@@ -31,7 +33,7 @@ from being generated if the FIQ is enabled.
qtd->error_count = 0;
goto handle_nak_done;
}
-@@ -1963,6 +1967,15 @@ static int32_t handle_hc_ack_intr(dwc_ot
+@@ -1963,6 +1967,15 @@ static int32_t handle_hc_ack_intr(dwc_otg_hcd_t * hcd,
halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK);
}
} else {
@@ -47,7 +49,7 @@ from being generated if the FIQ is enabled.
qtd->error_count = 0;
if (hc->qh->ping_state) {
-@@ -2328,6 +2341,14 @@ static int32_t handle_hc_datatglerr_intr
+@@ -2328,6 +2341,14 @@ static int32_t handle_hc_datatglerr_intr(dwc_otg_hcd_t * hcd,
qtd->urb, qtd, DWC_OTG_HC_XFER_XACT_ERR);
halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR);
} else if (hc->ep_is_in) {
@@ -62,3 +64,6 @@ from being generated if the FIQ is enabled.
qtd->error_count = 0;
}
+--
+1.9.1
+