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| author | John Crispin <blogic@openwrt.org> | 2014-09-12 06:53:00 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2014-09-12 06:53:00 +0000 |
| commit | a815cd075d28d03d283b015abff088d6682177e9 (patch) | |
| tree | 2fd753937adfd386d53c288644f39a1719b5426c /target/linux/atheros/patches-3.14/100-board.patch | |
| parent | 77a4c61c8a5c9e67f6354f78e12b59f5b4d424c5 (diff) | |
| download | master-187ad058-a815cd075d28d03d283b015abff088d6682177e9.tar.gz master-187ad058-a815cd075d28d03d283b015abff088d6682177e9.tar.bz2 master-187ad058-a815cd075d28d03d283b015abff088d6682177e9.zip | |
atheros: ar2315-pci: rework interrupt handling
Add PCI IRQ controller to facilitate interrupt handling, move interrupts
initialization to the IRQ controller initialization from
pcibios_plat_dev_init() callback.
Also remove odd PCI dev configuration manipulation from pcibios_plat_dev_init()
callback.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42501 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/atheros/patches-3.14/100-board.patch')
| -rw-r--r-- | target/linux/atheros/patches-3.14/100-board.patch | 50 |
1 files changed, 30 insertions, 20 deletions
diff --git a/target/linux/atheros/patches-3.14/100-board.patch b/target/linux/atheros/patches-3.14/100-board.patch index 7b1adbd711..c87734b69d 100644 --- a/target/linux/atheros/patches-3.14/100-board.patch +++ b/target/linux/atheros/patches-3.14/100-board.patch @@ -674,7 +674,7 @@ +#endif /* __ASM_MACH_AR231X_WAR_H */ --- /dev/null +++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h -@@ -0,0 +1,614 @@ +@@ -0,0 +1,624 @@ +/* + * Register definitions for AR2315+ + * @@ -716,6 +716,16 @@ +#define AR2315_MISC_IRQ_COUNT 10 + +/* ++ * PCI interrupts, which share IP5 ++ * Keep ordered according to AR2315_PCI_INT_XXX bits ++ */ ++#define AR2315_PCI_IRQ_BASE 0x50 ++#define AR2315_PCI_IRQ_EXT (AR2315_PCI_IRQ_BASE+0) ++#define AR2315_PCI_IRQ_ABORT (AR2315_PCI_IRQ_BASE+1) ++#define AR2315_PCI_IRQ_COUNT 2 ++#define AR2315_PCI_IRQ_SHIFT 25 /* in AR2315_PCI_INT_STATUS */ ++ ++/* + * Address map + */ +#define AR2315_SPI_READ 0x08000000 /* SPI FLASH */ @@ -1138,25 +1148,25 @@ + +#define AR2315_PCI_OUT_PTR (AR2315_PCI + 0x0408) + -+#define AR2315_PCI_INT_STATUS (AR2315_PCI + 0x0500) /* write one to clr */ -+#define AR2315_PCI_TXINT 0x00000001 /* Desc In Completed */ -+#define AR2315_PCI_TXOK 0x00000002 /* Desc In OK */ -+#define AR2315_PCI_TXERR 0x00000004 /* Desc In ERR */ -+#define AR2315_PCI_TXEOL 0x00000008 /* Desc In End-of-List */ -+#define AR2315_PCI_RXINT 0x00000010 /* Desc Out Completed */ -+#define AR2315_PCI_RXOK 0x00000020 /* Desc Out OK */ -+#define AR2315_PCI_RXERR 0x00000040 /* Desc Out ERR */ -+#define AR2315_PCI_RXEOL 0x00000080 /* Desc Out EOL */ -+#define AR2315_PCI_TXOOD 0x00000200 /* Desc In Out-of-Desc */ -+#define AR2315_PCI_MASK 0x0000FFFF /* Desc Mask */ -+#define AR2315_PCI_EXT_INT 0x02000000 -+#define AR2315_PCI_ABORT_INT 0x04000000 -+ -+#define AR2315_PCI_INT_MASK (AR2315_PCI + 0x0504) /* same as INT_STATUS */ -+ -+#define AR2315_PCI_INTEN_REG (AR2315_PCI + 0x0508) -+#define AR2315_PCI_INT_DISABLE 0x00 /* disable pci interrupts */ -+#define AR2315_PCI_INT_ENABLE 0x01 /* enable pci interrupts */ ++#define AR2315_PCI_ISR (AR2315_PCI + 0x0500) /* write one to clr */ ++#define AR2315_PCI_INT_TX 0x00000001 /* Desc In Completed */ ++#define AR2315_PCI_INT_TXOK 0x00000002 /* Desc In OK */ ++#define AR2315_PCI_INT_TXERR 0x00000004 /* Desc In ERR */ ++#define AR2315_PCI_INT_TXEOL 0x00000008 /* Desc In End-of-List */ ++#define AR2315_PCI_INT_RX 0x00000010 /* Desc Out Completed */ ++#define AR2315_PCI_INT_RXOK 0x00000020 /* Desc Out OK */ ++#define AR2315_PCI_INT_RXERR 0x00000040 /* Desc Out ERR */ ++#define AR2315_PCI_INT_RXEOL 0x00000080 /* Desc Out EOL */ ++#define AR2315_PCI_INT_TXOOD 0x00000200 /* Desc In Out-of-Desc */ ++#define AR2315_PCI_INT_DESCMASK 0x0000FFFF /* Desc Mask */ ++#define AR2315_PCI_INT_EXT 0x02000000 /* Extern PCI INTA */ ++#define AR2315_PCI_INT_ABORT 0x04000000 /* PCI bus abort event */ ++ ++#define AR2315_PCI_IMR (AR2315_PCI + 0x0504) /* mask _PCI_ISR bits */ ++ ++#define AR2315_PCI_IER (AR2315_PCI + 0x0508) /* global PCI int en */ ++#define AR2315_PCI_IER_DISABLE 0x00 /* disable pci interrupts */ ++#define AR2315_PCI_IER_ENABLE 0x01 /* enable pci interrupts */ + +#define AR2315_PCI_HOST_IN_EN (AR2315_PCI + 0x0800) +#define AR2315_PCI_HOST_IN_DIS (AR2315_PCI + 0x0804) |