diff options
author | Luka Perkov <luka.perkov@sartura.hr> | 2016-06-23 13:57:21 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2016-06-23 13:57:21 +0200 |
commit | 282b917e47d9ae5017e1e426face9b75cb7aabd0 (patch) | |
tree | 3284ca2d20d9c8d7a4563c6446675c1ecf3feac2 /target/linux/ar71xx/patches-4.4 | |
parent | 34d432b05312de6d9575c559db8209809489096d (diff) | |
parent | 441a9c879ba6562ea9f431cf33bbb0c0400d5fd0 (diff) | |
download | master-187ad058-282b917e47d9ae5017e1e426face9b75cb7aabd0.tar.gz master-187ad058-282b917e47d9ae5017e1e426face9b75cb7aabd0.tar.bz2 master-187ad058-282b917e47d9ae5017e1e426face9b75cb7aabd0.zip |
Merge pull request #11 from wigyori/master
pull req for 4.4.12, ar71xx/mediatek updates, package upgrades
Diffstat (limited to 'target/linux/ar71xx/patches-4.4')
16 files changed, 140 insertions, 836 deletions
diff --git a/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch b/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch deleted file mode 100644 index 2eba263732..0000000000 --- a/target/linux/ar71xx/patches-4.4/003-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch +++ /dev/null @@ -1,49 +0,0 @@ -From f1ba020af5076172c9d29006a747ccf40027fedc Mon Sep 17 00:00:00 2001 -Message-Id: <f1ba020af5076172c9d29006a747ccf40027fedc.1458840219.git.mschiffer@universe-factory.net> -From: Matthias Schiffer <mschiffer@universe-factory.net> -Date: Thu, 24 Mar 2016 15:34:05 +0100 -Subject: [PATCH] MIPS: ath79: make bootconsole wait for both THRE and TEMT - -This makes the ath79 bootconsole behave the same way as the generic 8250 -bootconsole. - -Also waiting for TEMT (transmit buffer is empty) instead of just THRE -(transmit buffer is not full) ensures that all characters have been -transmitted before the real serial driver starts reconfiguring the serial -controller (which would sometimes result in garbage being transmitted.) -This change does not cause a visible performance loss. - -In addition, this seems to fix a hang observed in certain configurations on -many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver. - -A more complete follow-up patch will disable 8250 autoconfig for ath79 -altogether (the serial controller is detected as a 16550A, which is not -fully compatible with the ath79 serial, and the autoconfig may lead to -undefined behavior on ath79.) - -Cc: <stable@vger.kernel.org> -Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> ---- - arch/mips/ath79/early_printk.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(voi - } while (1); - } - -+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) -+ - static void prom_putchar_ar71xx(unsigned char ch) - { - void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); - -- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); -+ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); - __raw_writel(ch, base + UART_TX * 4); -- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); -+ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); - } - - static void prom_putchar_ar933x(unsigned char ch) diff --git a/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch b/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch new file mode 100644 index 0000000000..0c07cb18c7 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch @@ -0,0 +1,15 @@ +HACK: register the GPIO driver earlier to ensure that gpio_request calls +from mach files succeed. + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -202,4 +202,8 @@ static struct platform_driver ath79_gpio + .probe = ath79_gpio_probe, + }; + +-module_platform_driver(ath79_gpio_driver); ++static int __init ath79_gpio_init(void) ++{ ++ return platform_driver_register(&ath79_gpio_driver); ++} ++postcore_initcall(ath79_gpio_init); diff --git a/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch b/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch new file mode 100644 index 0000000000..09e6617b90 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch @@ -0,0 +1,31 @@ +From: Felix Fietkau <nbd@nbd.name> +Date: Sat, 14 May 2016 20:20:04 +0200 +Subject: [PATCH] MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer + SoCs + +AR913x, AR724x and AR933x are the only SoCs where the +ath79_ddr_wb_flush_base starts at 0x7c, all newer SoCs use 0x9c +Invert the logic to make the code compatible with AR95xx + +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -46,12 +46,12 @@ void ath79_ddr_ctrl_init(void) + { + ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE, + AR71XX_DDR_CTRL_SIZE); +- if (soc_is_ar71xx() || soc_is_ar934x()) { +- ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c; +- ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c; +- } else { ++ if (soc_is_ar913x() || soc_is_ar724x() || soc_is_ar933x()) { + ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c; + ath79_ddr_pci_win_base = 0; ++ } else { ++ ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c; ++ ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c; + } + } + EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); diff --git a/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch b/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch new file mode 100644 index 0000000000..e5226a5dc3 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch @@ -0,0 +1,37 @@ +From: Felix Fietkau <nbd@nbd.name> +Date: Sun, 15 May 2016 13:09:20 +0200 +Subject: [PATCH] MIPS: ath79: fix regression in PCI window initialization + +ath79_ddr_pci_win_base has the type void __iomem *, so register offsets +need to be a multiple of 4. + +Cc: Alban Bedel <albeu@free.fr> +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -76,14 +76,14 @@ void ath79_ddr_set_pci_windows(void) + { + BUG_ON(!ath79_ddr_pci_win_base); + +- __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0); +- __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 1); +- __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 2); +- __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 3); +- __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 4); +- __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 5); +- __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 6); +- __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 7); ++ __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0x0); ++ __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 0x4); ++ __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 0x8); ++ __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 0xc); ++ __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 0x10); ++ __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 0x14); ++ __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 0x18); ++ __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 0x1c); + } + EXPORT_SYMBOL_GPL(ath79_ddr_set_pci_windows); + diff --git a/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch b/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch new file mode 100644 index 0000000000..64fb545b24 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch @@ -0,0 +1,23 @@ +From: Felix Fietkau <nbd@nbd.name> +Date: Wed, 18 May 2016 18:03:31 +0200 +Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush() + +ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets +need to be a multiple of 4. + +Cc: Alban Bedel <albeu@free.fr> +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); + + void ath79_ddr_wb_flush(u32 reg) + { +- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; ++ void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4; + + /* Flush the DDR write buffer. */ + __raw_writel(0x1, flush_reg); diff --git a/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch b/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch index 6a9132032f..04acdb6d9e 100644 --- a/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch +++ b/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c -@@ -229,7 +229,9 @@ static int m25p_probe(struct spi_device +@@ -251,7 +251,9 @@ static int m25p_probe(struct spi_device ppdata.of_node = spi->dev.of_node; diff --git a/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch b/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch index 175acf630e..866920a249 100644 --- a/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch +++ b/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c -@@ -227,6 +227,7 @@ static int m25p_probe(struct spi_device +@@ -249,6 +249,7 @@ static int m25p_probe(struct spi_device if (ret) return ret; diff --git a/target/linux/ar71xx/patches-4.4/431-spi-add-various-flags.patch b/target/linux/ar71xx/patches-4.4/431-spi-add-various-flags.patch index 5824a04284..bf5aff5c7e 100644 --- a/target/linux/ar71xx/patches-4.4/431-spi-add-various-flags.patch +++ b/target/linux/ar71xx/patches-4.4/431-spi-add-various-flags.patch @@ -1,6 +1,6 @@ --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h -@@ -690,6 +690,8 @@ struct spi_transfer { +@@ -695,6 +695,8 @@ struct spi_transfer { unsigned cs_change:1; unsigned tx_nbits:3; unsigned rx_nbits:3; @@ -9,7 +9,7 @@ #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ -@@ -735,6 +737,7 @@ struct spi_message { +@@ -740,6 +742,7 @@ struct spi_message { struct spi_device *spi; unsigned is_dma_mapped:1; diff --git a/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch b/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch index be6233c19c..6ccb632ecc 100644 --- a/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch +++ b/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch @@ -1,6 +1,6 @@ --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h -@@ -578,6 +578,12 @@ extern struct spi_master *spi_busnum_to_ +@@ -583,6 +583,12 @@ extern struct spi_master *spi_busnum_to_ /*---------------------------------------------------------------------------*/ @@ -13,7 +13,7 @@ /* * I/O INTERFACE between SPI controller and protocol drivers * -@@ -698,6 +704,7 @@ struct spi_transfer { +@@ -703,6 +709,7 @@ struct spi_transfer { u8 bits_per_word; u16 delay_usecs; u32 speed_hz; diff --git a/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch b/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch index 11bf9ff71b..f949235966 100644 --- a/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch +++ b/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c -@@ -137,10 +137,12 @@ static int m25p80_read(struct spi_nor *n +@@ -159,10 +159,12 @@ static int m25p80_read(struct spi_nor *n flash->command[0] = nor->read_opcode; m25p_addr2cmd(nor, from, flash->command); diff --git a/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch b/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch index f8ae4e00bb..03483e82a6 100644 --- a/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch +++ b/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c -@@ -137,6 +137,9 @@ static int m25p80_read(struct spi_nor *n +@@ -159,6 +159,9 @@ static int m25p80_read(struct spi_nor *n flash->command[0] = nor->read_opcode; m25p_addr2cmd(nor, from, flash->command); @@ -25,7 +25,7 @@ while (len--) { --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h -@@ -705,6 +705,7 @@ struct spi_transfer { +@@ -710,6 +710,7 @@ struct spi_transfer { u16 delay_usecs; u32 speed_hz; enum spi_transfer_type type; diff --git a/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch b/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch index 50be509e6c..4699c82746 100644 --- a/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch +++ b/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch @@ -12,92 +12,3 @@ help Say 'Y' here if you want your kernel to support the Ubiquiti Networks XM (rev 1.0) board. ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -16,10 +16,11 @@ - - #include <asm/mach-ath79/irq.h> - --#include "machtypes.h" -+#include "dev-ap9x-pci.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" - #include "pci.h" - - #define UBNT_XM_GPIO_LED_L1 0 -@@ -32,7 +33,7 @@ - #define UBNT_XM_KEYS_POLL_INTERVAL 20 - #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) - --#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) -+#define UBNT_XM_EEPROM_ADDR 0x1fff1000 - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { - { -@@ -65,48 +66,10 @@ static struct gpio_keys_button ubnt_xm_g - } - }; - --static struct spi_board_info ubnt_xm_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- } --}; -- --static struct ath79_spi_platform_data ubnt_xm_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --#ifdef CONFIG_PCI --static struct ath9k_platform_data ubnt_xm_eeprom_data; -- --static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &ubnt_xm_eeprom_data; -- break; -- } -- -- return 0; --} -- --static void __init ubnt_xm_pci_init(void) --{ -- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -- sizeof(ubnt_xm_eeprom_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void ubnt_xm_pci_init(void) {} --#endif /* CONFIG_PCI */ -- - static void __init ubnt_xm_init(void) - { -+ u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), - ubnt_xm_leds_gpio); - -@@ -114,10 +77,8 @@ static void __init ubnt_xm_init(void) - ARRAY_SIZE(ubnt_xm_gpio_keys), - ubnt_xm_gpio_keys); - -- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, -- ARRAY_SIZE(ubnt_xm_spi_info)); -- -- ubnt_xm_pci_init(); -+ ath79_register_m25p80(NULL); -+ ap91_pci_init(eeprom, NULL); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, diff --git a/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch b/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch index b463d14156..2bfd58d4e8 100644 --- a/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch +++ b/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch @@ -1,629 +1,8 @@ ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -12,16 +12,26 @@ - - #include <linux/init.h> - #include <linux/pci.h> -+#include <linux/platform_device.h> - #include <linux/ath9k_platform.h> -+#include <linux/etherdevice.h> -+#include <linux/ar8216_platform.h> - -+#include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/irq.h> -+#include <asm/mach-ath79/ar71xx_regs.h> - -+#include <linux/platform_data/phy-at803x.h> -+ -+#include "common.h" - #include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" - #include "machtypes.h" --#include "pci.h" - - #define UBNT_XM_GPIO_LED_L1 0 - #define UBNT_XM_GPIO_LED_L2 1 -@@ -37,19 +47,19 @@ - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { - { -- .name = "ubnt-xm:red:link1", -+ .name = "ubnt:red:link1", - .gpio = UBNT_XM_GPIO_LED_L1, - .active_low = 0, - }, { -- .name = "ubnt-xm:orange:link2", -+ .name = "ubnt:orange:link2", - .gpio = UBNT_XM_GPIO_LED_L2, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link3", -+ .name = "ubnt:green:link3", - .gpio = UBNT_XM_GPIO_LED_L3, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link4", -+ .name = "ubnt:green:link4", - .gpio = UBNT_XM_GPIO_LED_L4, - .active_low = 0, - }, -@@ -66,9 +76,13 @@ static struct gpio_keys_button ubnt_xm_g - } - }; - -+#define UBNT_M_WAN_PHYMASK BIT(4) -+ - static void __init ubnt_xm_init(void) - { - u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), - ubnt_xm_leds_gpio); -@@ -79,9 +93,552 @@ static void __init ubnt_xm_init(void) - - ath79_register_m25p80(NULL); - ap91_pci_init(eeprom, NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, - "UBNT-XM", - "Ubiquiti Networks XM (rev 1.0) board", - ubnt_xm_init); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M", -+ ubnt_xm_init); -+ -+static void __init ubnt_rocket_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M", -+ ubnt_rocket_m_setup); -+ -+static void __init ubnt_nano_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M", -+ ubnt_nano_m_setup); -+ -+static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:globe", -+ .gpio = 0, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:power", -+ .gpio = 11, -+ .active_low = 1, -+ .default_state = LEDS_GPIO_DEFSTATE_ON, -+ } -+}; -+ -+static void __init ubnt_airrouter_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_local_mac(ath79_eth1_data.mac_addr, mac1); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ ath79_register_usb(); -+ -+ ap91_pci_init(ee, NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio), -+ ubnt_airrouter_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter", -+ ubnt_airrouter_setup); -+ -+static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:dome", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:dome", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led ubnt_unifi_outdoor_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:front", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:front", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led ubnt_unifi_outdoor_plus_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:white:front", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:blue:front", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+ -+static void __init ubnt_unifi_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_register_eth(0); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio), -+ ubnt_unifi_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi", -+ ubnt_unifi_setup); -+ -+ -+#define UBNT_UNIFIOD_PRI_PHYMASK BIT(4) -+#define UBNT_UNIFIOD_2ND_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+static void __init ubnt_unifi_outdoor_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | -+ UBNT_UNIFIOD_2ND_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_leds_gpio), -+ ubnt_unifi_outdoor_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR, "UBNT-U20", -+ "Ubiquiti UniFiAP Outdoor", -+ ubnt_unifi_outdoor_setup); -+ -+ -+static void __init ubnt_unifi_outdoor_plus_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | -+ UBNT_UNIFIOD_2ND_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio), -+ ubnt_unifi_outdoor_plus_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, "UBNT-UOP", -+ "Ubiquiti UniFiAP Outdoor+", -+ ubnt_unifi_outdoor_plus_setup); -+ -+ -+static struct gpio_led ubnt_uap_pro_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:white:dome", -+ .gpio = 12, -+ }, { -+ .name = "ubnt:blue:dome", -+ .gpio = 13, -+ } -+}; -+ -+static struct gpio_keys_button uap_pro_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 17, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg uap_pro_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data uap_pro_ar8327_data = { -+ .pad0_cfg = &uap_pro_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info uap_pro_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &uap_pro_ar8327_data, -+ }, -+}; -+ -+#define UAP_PRO_MAC0_OFFSET 0x0000 -+#define UAP_PRO_MAC1_OFFSET 0x0006 -+#define UAP_PRO_WMAC_CALDATA_OFFSET 0x1000 -+#define UAP_PRO_PCI_CALDATA_OFFSET 0x5000 -+ -+static void __init ubnt_uap_pro_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds), -+ ubnt_uap_pro_gpio_leds); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(uap_pro_gpio_keys), -+ uap_pro_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(uap_pro_mdio0_info, -+ ARRAY_SIZE(uap_pro_mdio0_info)); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UAP_PRO, "UAP-PRO", "Ubiquiti UniFi AP Pro", -+ ubnt_uap_pro_setup); -+ -+#define UBNT_XW_GPIO_LED_L1 11 -+#define UBNT_XW_GPIO_LED_L2 16 -+#define UBNT_XW_GPIO_LED_L3 13 -+#define UBNT_XW_GPIO_LED_L4 14 -+ -+static struct gpio_led ubnt_xw_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:red:link1", -+ .gpio = UBNT_XW_GPIO_LED_L1, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:orange:link2", -+ .gpio = UBNT_XW_GPIO_LED_L2, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link3", -+ .gpio = UBNT_XW_GPIO_LED_L3, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link4", -+ .gpio = UBNT_XW_GPIO_LED_L4, -+ .active_low = 1, -+ }, -+}; -+ -+#define UBNT_ROCKET_TI_GPIO_LED_L1 16 -+#define UBNT_ROCKET_TI_GPIO_LED_L2 17 -+#define UBNT_ROCKET_TI_GPIO_LED_L3 18 -+#define UBNT_ROCKET_TI_GPIO_LED_L4 19 -+#define UBNT_ROCKET_TI_GPIO_LED_L5 20 -+#define UBNT_ROCKET_TI_GPIO_LED_L6 21 -+static struct gpio_led ubnt_rocket_ti_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:link1", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L1, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link2", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L2, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link3", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L3, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link4", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L4, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:link5", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L5, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:link6", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L6, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init ubnt_xw_init(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), -+ ubnt_xw_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+} -+ -+static void __init ubnt_nano_m_xw_setup(void) -+{ -+ ubnt_xw_init(); -+ -+ /* GMAC0 is connected to an AR8326 switch */ -+ ath79_register_mdio(0, ~(BIT(0) | BIT(1) | BIT(5))); -+ ath79_eth0_data.phy_mask = (BIT(0) | BIT(1) | BIT(5)); -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_register_eth(0); -+} -+ -+static void __init ubnt_loco_m_xw_setup(void) -+{ -+ ubnt_xw_init(); -+ -+ ath79_register_mdio(0, ~BIT(1)); -+ ath79_eth0_data.phy_mask = BIT(1); -+ ath79_register_eth(0); -+} -+ -+static void __init ubnt_rocket_m_xw_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), -+ ubnt_xw_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_mdio(0, ~BIT(4)); -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+static struct at803x_platform_data ubnt_rocket_m_ti_at803_data = { -+ .disable_smarteee = 1, -+ .enable_rgmii_rx_delay = 1, -+ .enable_rgmii_tx_delay = 1, -+}; -+static struct mdio_board_info ubnt_rocket_m_ti_mdio_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 4, -+ .platform_data = &ubnt_rocket_m_ti_at803_data, -+ }, -+}; -+ -+static void __init ubnt_rocket_m_ti_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rocket_ti_leds_gpio), -+ ubnt_rocket_ti_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ap91_pci_init(eeprom + 0x1000, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_setup_ar934x_eth_rx_delay(3, 3); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ eeprom + UAP_PRO_MAC1_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ mdiobus_register_board_info(ubnt_rocket_m_ti_mdio_info, -+ ARRAY_SIZE(ubnt_rocket_m_ti_mdio_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ -+ ath79_eth0_data.phy_mask = BIT(4); -+ /* read out from vendor */ -+ ath79_eth0_pll_data.pll_1000 = 0x2000000; -+ ath79_eth0_pll_data.pll_10 = 0x1313; -+ ath79_register_eth(0); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_eth1_data.phy_mask = BIT(3); -+ ath79_register_eth(1); -+} -+ -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M_XW, "UBNT-NM-XW", "Ubiquiti Nanostation M XW", -+ ubnt_nano_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_LOCO_M_XW, "UBNT-LOCO-XW", "Ubiquiti Loco M XW", -+ ubnt_loco_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_XW, "UBNT-RM-XW", "Ubiquiti Rocket M XW", -+ ubnt_rocket_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_TI, "UBNT-RM-TI", "Ubiquiti Rocket M TI", -+ ubnt_rocket_m_ti_setup); -+ -+static struct gpio_led ubnt_airgateway_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:blue:wlan", -+ .gpio = 0, -+ }, { -+ .name = "ubnt:white:status", -+ .gpio = 1, -+ }, -+}; -+ -+static struct gpio_keys_button airgateway_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 1, -+ } -+}; -+ -+static void __init ubnt_airgateway_setup(void) -+{ -+ u32 t; -+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_gpio_leds), -+ ubnt_airgateway_gpio_leds); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(airgateway_gpio_keys), -+ airgateway_gpio_keys); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGW, "UBNT-AGW", "Ubiquiti AirGateway", -+ ubnt_airgateway_setup); -+ --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -68,12 +68,16 @@ config ATH79_MACH_PB44 Atheros PB44 reference board. - + config ATH79_MACH_UBNT_XM - bool "Ubiquiti Networks XM (rev 1.0) board" + bool "Ubiquiti Networks XM/UniFi boards" diff --git a/target/linux/ar71xx/patches-4.4/610-MIPS-ath79-UBNT-add-airGateway-pro-support.patch b/target/linux/ar71xx/patches-4.4/610-MIPS-ath79-UBNT-add-airGateway-pro-support.patch deleted file mode 100644 index 27cc1e50a7..0000000000 --- a/target/linux/ar71xx/patches-4.4/610-MIPS-ath79-UBNT-add-airGateway-pro-support.patch +++ /dev/null @@ -1,62 +0,0 @@ ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -642,3 +642,59 @@ static void __init ubnt_airgateway_setup - MIPS_MACHINE(ATH79_MACH_UBNT_AIRGW, "UBNT-AGW", "Ubiquiti AirGateway", - ubnt_airgateway_setup); - -+static struct gpio_led ubnt_airgateway_pro_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:blue:wlan", -+ .gpio = 13, -+ }, { -+ .name = "ubnt:white:status", -+ .gpio = 17, -+ }, -+}; -+ -+ -+static struct gpio_keys_button airgateway_pro_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 1, -+ } -+}; -+ -+static void __init ubnt_airgateway_pro_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_pro_gpio_leds), -+ ubnt_airgateway_pro_gpio_leds); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(airgateway_pro_gpio_keys), -+ airgateway_pro_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* GMAC0 is left unused in this configuration */ -+ -+ /* GMAC1 is connected to MAC0 on the internal switch */ -+ /* The PoE/WAN port connects to port 5 on the internal switch */ -+ /* The LAN port connects to port 4 on the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGWP, "UBNT-AGWP", "Ubiquiti AirGateway Pro", -+ ubnt_airgateway_pro_setup); diff --git a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 6fd6dafd47..08a684becd 100644 --- a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -335,10 +335,10 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. + status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS); + + if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) { -+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE); ++ ath79_ddr_wb_flush(3); + generic_handle_irq(ATH79_IP2_IRQ(0)); + } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) { -+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC); ++ ath79_ddr_wb_flush(4); + generic_handle_irq(ATH79_IP2_IRQ(1)); + } else { + spurious_interrupt(); diff --git a/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch index b4b749e4b9..17a53ed6e6 100644 --- a/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch +++ b/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch @@ -299,7 +299,7 @@ ptr--; } if (tunnel->parms.o_flags&GRE_KEY) { -@@ -836,7 +836,7 @@ static inline int ip6gre_xmit_ipv6(struc +@@ -838,7 +838,7 @@ static inline int ip6gre_xmit_ipv6(struc dsfield = ipv6_get_dsfield(ipv6h); if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) @@ -310,7 +310,7 @@ if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) --- a/net/ipv6/ip6_tunnel.c +++ b/net/ipv6/ip6_tunnel.c -@@ -1396,7 +1396,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1386,7 +1386,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str dsfield = ipv6_get_dsfield(ipv6h); if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) @@ -491,7 +491,7 @@ memcpy(p, foc->val, foc->len); --- a/net/ipv4/igmp.c +++ b/net/ipv4/igmp.c -@@ -501,7 +501,7 @@ static struct sk_buff *add_grec(struct s +@@ -500,7 +500,7 @@ static struct sk_buff *add_grec(struct s if (!skb) return NULL; psrc = (__be32 *)skb_put(skb, sizeof(__be32)); @@ -910,3 +910,22 @@ /* Values for "flag" field in struct arpt_ip (general arp structure). * No flags defined yet. +--- a/net/core/utils.c ++++ b/net/core/utils.c +@@ -321,8 +321,14 @@ void inet_proto_csum_replace16(__sum16 * + bool pseudohdr) + { + __be32 diff[] = { +- ~from[0], ~from[1], ~from[2], ~from[3], +- to[0], to[1], to[2], to[3], ++ ~net_hdr_word(&from[0]), ++ ~net_hdr_word(&from[1]), ++ ~net_hdr_word(&from[2]), ++ ~net_hdr_word(&from[3]), ++ net_hdr_word(&to[0]), ++ net_hdr_word(&to[1]), ++ net_hdr_word(&to[2]), ++ net_hdr_word(&to[3]), + }; + if (skb->ip_summed != CHECKSUM_PARTIAL) { + *sum = csum_fold(csum_partial(diff, sizeof(diff), |