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| author | Felix Fietkau <nbd@openwrt.org> | 2015-07-19 17:58:40 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-07-19 17:58:40 +0000 |
| commit | ed2bc20d7f7aab0886ccf8baf4141740c249f6a8 (patch) | |
| tree | 2d67b9ac31f10f44186aa6ef9114bc8dc725c98c /target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch | |
| parent | 625ac75f09f72d599c42b5a9f26374b84baafec7 (diff) | |
| download | master-187ad058-ed2bc20d7f7aab0886ccf8baf4141740c249f6a8.tar.gz master-187ad058-ed2bc20d7f7aab0886ccf8baf4141740c249f6a8.tar.bz2 master-187ad058-ed2bc20d7f7aab0886ccf8baf4141740c249f6a8.zip | |
ar71xx: add 4.1 support
Signed-off-by: Roman Yeryomin <roman@advem.lv>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46426 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch b/target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch new file mode 100644 index 0000000000..c628f1df89 --- /dev/null +++ b/target/linux/ar71xx/patches-4.1/811-MIPS-ath79-gpio-enable-set-direction.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); + void ath79_gpio_output_select(unsigned gpio, u8 val); ++int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -130,6 +130,30 @@ static int ar934x_gpio_direction_output( + return 0; + } + ++int ath79_gpio_direction_select(unsigned gpio, bool oe) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ bool ieq_1 = (soc_is_ar934x() || ++ soc_is_qca953x()); ++ ++ if (gpio >= ath79_gpio_count) ++ return -1; ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ if ((ieq_1 && oe) || (!ieq_1 && !oe)) ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ else ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++ ++ return 0; ++} ++ + static struct gpio_chip ath79_gpio_chip = { + .label = "ath79", + .get = ath79_gpio_get_value, |