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author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-12 12:25:38 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2013-01-12 12:25:38 +0000 |
commit | 067615aea6818b25acea2bc12ad816a5905ab00b (patch) | |
tree | d790e392e1f96d29c16378347560ec27af8b2cde /target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch | |
parent | 54666428aed9abbb1b12cdcaaa462280b6e420c2 (diff) | |
download | master-187ad058-067615aea6818b25acea2bc12ad816a5905ab00b.tar.gz master-187ad058-067615aea6818b25acea2bc12ad816a5905ab00b.tar.bz2 master-187ad058-067615aea6818b25acea2bc12ad816a5905ab00b.zip |
ar71xx: remove 3.6 support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35114 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch | 106 |
1 files changed, 0 insertions, 106 deletions
diff --git a/target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch b/target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch deleted file mode 100644 index a9845baba8..0000000000 --- a/target/linux/ar71xx/patches-3.6/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 177dc53a07e2c660d1c1a6cec4576c802325e330 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Nov 2012 09:02:01 +0100 -Subject: [PATCH] MIPS: ath79: fix GPIO function selection for AR934x SoCs - -GPIO function selection is not working on the AR934x -SoCs because the offset of the function selection -register is different on those. - -Add a helper routine which returns the correct -register address based on the SoC type, and use -that in the 'ath79_gpio_function_*' routines. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/gpio.c | 38 ++++++++++++++++-------- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ - 2 files changed, 28 insertions(+), 12 deletions(-) - ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -137,47 +137,61 @@ static struct gpio_chip ath79_gpio_chip - .base = 0, - }; - -+static void __iomem *ath79_gpio_get_function_reg(void) -+{ -+ u32 reg = 0; -+ -+ if (soc_is_ar71xx() || -+ soc_is_ar724x() || -+ soc_is_ar913x() || -+ soc_is_ar933x()) -+ reg = AR71XX_GPIO_REG_FUNC; -+ else if (soc_is_ar934x()) -+ reg = AR934X_GPIO_REG_FUNC; -+ else -+ BUG(); -+ -+ return ath79_gpio_base + reg; -+} -+ - void ath79_gpio_function_enable(u32 mask) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel(__raw_readl(reg) | mask, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } - - void ath79_gpio_function_disable(u32 mask) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel(__raw_readl(reg) & ~mask, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } - - void ath79_gpio_function_setup(u32 set, u32 clear) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -520,6 +520,8 @@ - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 - -+#define AR934X_GPIO_REG_FUNC 0x6c -+ - #define AR71XX_GPIO_COUNT 16 - #define AR7240_GPIO_COUNT 18 - #define AR7241_GPIO_COUNT 20 |