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author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-12 20:38:57 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2012-03-12 20:38:57 +0000 |
commit | caae34337e2037f66a53f251e2ff08d5e9a26ae3 (patch) | |
tree | b70c3769d0947971a2725d69e5424693bc755294 /target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch | |
parent | b169293875dafedbb6b6e03dc87ad5df93530bca (diff) | |
download | master-187ad058-caae34337e2037f66a53f251e2ff08d5e9a26ae3.tar.gz master-187ad058-caae34337e2037f66a53f251e2ff08d5e9a26ae3.tar.bz2 master-187ad058-caae34337e2037f66a53f251e2ff08d5e9a26ae3.zip |
ar71xx: merge ar934x_bo_ddr_flush patch
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30912 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch b/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch deleted file mode 100644 index c405a75247..0000000000 --- a/target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch +++ /dev/null @@ -1,49 +0,0 @@ ---- a/arch/mips/ath79/dev-eth.c -+++ b/arch/mips/ath79/dev-eth.c -@@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe - /* TODO */ - } - -+static void ath79_ddr_no_flush(void) -+{ -+} -+ - static void ath79_ddr_flush_ge0(void) - { - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); -@@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void) - ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); - } - --static void ar934x_ddr_flush_ge0(void) --{ -- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0); --} -- --static void ar934x_ddr_flush_ge1(void) --{ -- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1); --} -- - static struct resource ath79_eth0_resources[] = { - { - .name = "mac_base", -@@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned - if (id == 0) { - pdata->reset_bit = AR934X_RESET_GE0_MAC | - AR934X_RESET_GE0_MDIO; -- pdata->ddr_flush =ar934x_ddr_flush_ge0; - pdata->set_speed = ar934x_set_speed_ge0; - } else { - pdata->reset_bit = AR934X_RESET_GE1_MAC | - AR934X_RESET_GE1_MDIO; -- pdata->ddr_flush = ar934x_ddr_flush_ge1; - pdata->set_speed = ar934x_set_speed_ge1; - - pdata->switch_data = &ath79_switch_data; - } - -+ pdata->ddr_flush = ath79_ddr_no_flush; - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - |