aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/patches-3.18
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@openwrt.org>2015-06-14 17:41:01 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-06-14 17:41:01 +0000
commit9aca50fb00c3ec8177a4e5069d8723570eca560d (patch)
treebcff0db2eaf17655afb689978181fcf7133b6988 /target/linux/ar71xx/patches-3.18
parent4a5a71ea72dad7cce49926247991469742a7d279 (diff)
downloadmaster-187ad058-9aca50fb00c3ec8177a4e5069d8723570eca560d.tar.gz
master-187ad058-9aca50fb00c3ec8177a4e5069d8723570eca560d.tar.bz2
master-187ad058-9aca50fb00c3ec8177a4e5069d8723570eca560d.zip
ar71xx: fix 100/10mbps ethernet link issues on mynet range extender
The mynet range extender hardware is suffering from ethernet link loss when booting with a recent openwrt image. This only happens on 100mbps links, with 1Gbps speed the link was fine. The cause of the problem is that the AR8035 PHY (aka F1E) requires turning on and off the special TX delay setting depending on the speed of the link. The 10mbps mode only needed the proper pll value, which was extracted from the vendor code. Reported-by: Pascal Paradis Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45954 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.18')
-rw-r--r--target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch53
1 files changed, 49 insertions, 4 deletions
diff --git a/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch b/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch
index babc695ce9..d046edef22 100644
--- a/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch
+++ b/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch
@@ -32,6 +32,14 @@
#define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05
#define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8)
+@@ -50,6 +60,7 @@ MODULE_LICENSE("GPL");
+ struct at803x_priv {
+ bool phy_reset:1;
+ struct gpio_desc *gpiod_reset;
++ int prev_speed;
+ };
+
+ struct at803x_context {
@@ -61,6 +71,43 @@ struct at803x_context {
u16 led_control;
};
@@ -120,16 +128,53 @@
return 0;
}
+@@ -258,6 +334,8 @@ static int at803x_config_intr(struct phy
+ static void at803x_link_change_notify(struct phy_device *phydev)
+ {
+ struct at803x_priv *priv = phydev->priv;
++ struct at803x_platform_data *pdata;
++ pdata = dev_get_platdata(&phydev->dev);
+
+ /*
+ * Conduct a hardware reset for AT8030 every time a link loss is
+@@ -287,6 +365,26 @@ static void at803x_link_change_notify(st
+ } else {
+ priv->phy_reset = false;
+ }
++ }
++ if (pdata->fixup_rgmii_tx_delay &&
++ phydev->speed != priv->prev_speed) {
++ switch (phydev->speed) {
++ case SPEED_10:
++ case SPEED_100:
++ at803x_dbg_reg_set(phydev,
++ AT803X_DEBUG_SYSTEM_MODE_CTRL,
++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
++ break;
++ case SPEED_1000:
++ at803x_dbg_reg_clr(phydev,
++ AT803X_DEBUG_SYSTEM_MODE_CTRL,
++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
++ break;
++ default:
++ break;
++ }
++
++ priv->prev_speed = phydev->speed;
+ }
+ }
+
--- /dev/null
+++ b/include/linux/platform_data/phy-at803x.h
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,11 @@
+#ifndef _PHY_AT803X_PDATA_H
+#define _PHY_AT803X_PDATA_H
+
+struct at803x_platform_data {
-+ int disable_smarteee:1;
-+ int enable_rgmii_tx_delay:1;
-+ int enable_rgmii_rx_delay:1;
++ int disable_smarteee:1;
++ int enable_rgmii_tx_delay:1;
++ int enable_rgmii_rx_delay:1;
++ int fixup_rgmii_tx_delay:1;
+};
+
+#endif /* _PHY_AT803X_PDATA_H */