aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/files/arch
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2011-04-07 20:53:00 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-04-07 20:53:00 +0000
commit912c77a418bd0de818510bc51d9a17fd367a44f1 (patch)
tree773dbf06ab2414b2c6dd3656570790502b41e80f /target/linux/ar71xx/files/arch
parent6733c6b326f645d365c7fc66882a036bb2c3f77d (diff)
downloadmaster-187ad058-912c77a418bd0de818510bc51d9a17fd367a44f1.tar.gz
master-187ad058-912c77a418bd0de818510bc51d9a17fd367a44f1.tar.bz2
master-187ad058-912c77a418bd0de818510bc51d9a17fd367a44f1.zip
ar71xx: enable GPIO support for the AR934x SoCs
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26513 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c6
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h6
2 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
index cdb614bbe1..0ee6847003 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
@@ -172,6 +172,12 @@ void __init ar71xx_gpio_init(void)
ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT;
break;
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+ ar71xx_gpio_chip.ngpio = AR934X_GPIO_COUNT;
+ break;
+
default:
BUG();
}
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index ab00d19e18..e671f58ed7 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -427,6 +427,12 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
#define AR91XX_GPIO_COUNT 22
+#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14)
+#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13)
+
+#define AR934X_GPIO_COUNT 32
+#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17)
+
extern void __iomem *ar71xx_gpio_base;
static inline void ar71xx_gpio_wr(unsigned reg, u32 value)