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| author | Gabor Juhos <juhosg@openwrt.org> | 2011-11-14 17:43:11 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2011-11-14 17:43:11 +0000 |
| commit | 2db6e74505055333aa1b663def672d6a0a3f4f6b (patch) | |
| tree | 5806465a3337a562551c17b39b32e700d7a9ec61 /target/linux/ar71xx/files/arch/mips/include | |
| parent | de3ee69258bc2ebd5a9033e6d40e5c16cd763dfc (diff) | |
| download | master-187ad058-2db6e74505055333aa1b663def672d6a0a3f4f6b.tar.gz master-187ad058-2db6e74505055333aa1b663def672d6a0a3f4f6b.tar.bz2 master-187ad058-2db6e74505055333aa1b663def672d6a0a3f4f6b.zip | |
ar71xx: add AR71XX_ prefix to GPIO_REG_* defines
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29123 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/include')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index 91f382480a..a83b0460b0 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -418,17 +418,17 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg) /* * GPIO block */ -#define GPIO_REG_OE 0x00 -#define GPIO_REG_IN 0x04 -#define GPIO_REG_OUT 0x08 -#define GPIO_REG_SET 0x0c -#define GPIO_REG_CLEAR 0x10 -#define GPIO_REG_INT_MODE 0x14 -#define GPIO_REG_INT_TYPE 0x18 -#define GPIO_REG_INT_POLARITY 0x1c -#define GPIO_REG_INT_PENDING 0x20 -#define GPIO_REG_INT_ENABLE 0x24 -#define GPIO_REG_FUNC 0x28 +#define AR71XX_GPIO_REG_OE 0x00 +#define AR71XX_GPIO_REG_IN 0x04 +#define AR71XX_GPIO_REG_OUT 0x08 +#define AR71XX_GPIO_REG_SET 0x0c +#define AR71XX_GPIO_REG_CLEAR 0x10 +#define AR71XX_GPIO_REG_INT_MODE 0x14 +#define AR71XX_GPIO_REG_INT_TYPE 0x18 +#define AR71XX_GPIO_REG_INT_POLARITY 0x1c +#define AR71XX_GPIO_REG_INT_PENDING 0x20 +#define AR71XX_GPIO_REG_INT_ENABLE 0x24 +#define AR71XX_GPIO_REG_FUNC 0x28 #define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) #define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) |