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| author | Felix Fietkau <nbd@openwrt.org> | 2015-07-07 08:05:50 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-07-07 08:05:50 +0000 |
| commit | 95be1231b7a05be9a95cd4766a56472663bac4b1 (patch) | |
| tree | 38845d0d5605a5246379f475f00dfb09e7b95530 /target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c | |
| parent | 0b73c512c0f09ec7daac37358091fd4da02ca299 (diff) | |
| download | master-187ad058-95be1231b7a05be9a95cd4766a56472663bac4b1.tar.gz master-187ad058-95be1231b7a05be9a95cd4766a56472663bac4b1.tar.bz2 master-187ad058-95be1231b7a05be9a95cd4766a56472663bac4b1.zip | |
ar71xx: fix ethernet initialization on QCA953x-based boards (TP-Link TL-WR841N/ND v9, Compex WPJ531)
The initialization routines for these boards were relying on some (wrong)
defaults for the QCA953x ethernet. Make these defaults explicit to prevent
breaking them when the QCA953x defaults are fixed.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46206 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c index bc13d7019f..e665a2e993 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c @@ -105,12 +105,19 @@ static void __init common_setup(void) ath79_register_mdio(0, 0x0); /* LAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.phy_mask = BIT(4); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ath79_register_eth(0); /* WAN */ ath79_switch_data.phy4_mii_en = 1; + ath79_eth1_data.duplex = DUPLEX_FULL; ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth1_data.speed = SPEED_100; + ath79_switch_data.phy_poll_mask |= BIT(4); ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ath79_register_eth(1); |