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| author | Gabor Juhos <juhosg@openwrt.org> | 2014-07-13 19:44:00 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2014-07-13 19:44:00 +0000 |
| commit | ca2f13b68b2c19622155573888ac695a896b2db7 (patch) | |
| tree | ad41fff0e22976b02650e3c1ff88afdf6df929b2 /target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c | |
| parent | a033c69dbbd1153837d1b0a3c952fad0af6ec2ee (diff) | |
| download | master-187ad058-ca2f13b68b2c19622155573888ac695a896b2db7.tar.gz master-187ad058-ca2f13b68b2c19622155573888ac695a896b2db7.tar.bz2 master-187ad058-ca2f13b68b2c19622155573888ac695a896b2db7.zip | |
ar71xx: use ath79_setup_qca955x_eth_cfg helper for QCA955x based boards
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41627 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c index dc5034114f..01719eb5b5 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c @@ -182,23 +182,6 @@ static struct mdio_board_info archer_c7_mdio0_info[] = { }, }; -static void __init archer_c7_gmac_setup(void) -{ - void __iomem *base; - u32 t; - - base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); - - t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); - - t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); - t |= QCA955X_ETH_CFG_RGMII_EN; - - __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - static void __init common_setup(bool pcie_slot) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); @@ -227,7 +210,7 @@ static void __init common_setup(bool pcie_slot) ARRAY_SIZE(archer_c7_mdio0_info)); ath79_register_mdio(0, 0x0); - archer_c7_gmac_setup(); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |