diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2012-09-09 14:05:20 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-09-09 14:05:20 +0000 |
| commit | 26e1a6b953837dd78ba98204fb7668bd9e5b496e (patch) | |
| tree | e46de6e3b6075a4a957c09790cd114c978dddfb0 /target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | |
| parent | 773fa9a77fe8e0264eda62102ff1e295f813339f (diff) | |
| download | master-187ad058-26e1a6b953837dd78ba98204fb7668bd9e5b496e.tar.gz master-187ad058-26e1a6b953837dd78ba98204fb7668bd9e5b496e.tar.bz2 master-187ad058-26e1a6b953837dd78ba98204fb7668bd9e5b496e.zip | |
ar71xx: use dynamic clock dividers on the 2nd MDIO of AR934x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33343 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index e6a5076019..d2d0ee87f0 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -19,6 +19,7 @@ #include <linux/etherdevice.h> #include <linux/platform_device.h> #include <linux/serial_8250.h> +#include <linux/clk.h> #include <asm/mach-ath79/ath79.h> #include <asm/mach-ath79/ar71xx_regs.h> @@ -146,6 +147,31 @@ static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) iounmap(base); } +static unsigned long ar934x_get_mdio_ref_clock(void) +{ + void __iomem *base; + unsigned long ret; + u32 t; + + base = ioremap(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); + + ret = 0; + t = __raw_readl(base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); + if (t & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) { + ret = 100 * 1000 * 1000; + } else { + struct clk *clk; + + clk = clk_get(NULL, "ref"); + if (!IS_ERR(clk)) + ret = clk_get_rate(clk); + } + + iounmap(base); + + return ret; +} + void __init ath79_register_mdio(unsigned int id, u32 phy_mask) { struct platform_device *mdio_dev; @@ -217,6 +243,13 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask) case ATH79_SOC_AR9341: case ATH79_SOC_AR9342: case ATH79_SOC_AR9344: + if (id == 1) { + mdio_data->builtin_switch = 1; + mdio_data->ref_clock = ar934x_get_mdio_ref_clock(); + mdio_data->mdio_clock = 6250000; + } + mdio_data->is_ar934x = 1; + break; case ATH79_SOC_QCA9558: if (id == 1) mdio_data->builtin_switch = 1; |