upgrade to latest compat-wireless and rt2800 version

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14605 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 193 insertions, 0 deletions

diff --git a/package/mac80211/patches/311-rt2x00-Channel-HT40-fixes-rt2800pci.patch b/package/mac80211/patches/311-rt2x00-Channel-HT40-fixes-rt2800pci.patch
new file mode 100644
index 0000000000..635cdeef1c
--- /dev/null
+++ b/package/mac80211/patches/311-rt2x00-Channel-HT40-fixes-rt2800pci.patch
@@ -0,0 +1,193 @@
+From 1c042f183a52db009c2c0940ecff04ae954318e2 Mon Sep 17 00:00:00 2001
+From: Ivo van Doorn <IvDoorn@gmail.com>
+Date: Sun, 8 Feb 2009 00:08:37 +0100
+Subject: [PATCH] rt2x00: Channel HT40+/- fixes (rt2800pci)
+
+Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
+---
+ drivers/net/wireless/rt2x00/rt2800pci.c |   69 +++++++++++++++----------------
+ drivers/net/wireless/rt2x00/rt2800pci.h |    3 +-
+ 2 files changed, 36 insertions(+), 36 deletions(-)
+
+diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
+index 95eb053..ddea65b 100644
+--- a/drivers/net/wireless/rt2x00/rt2800pci.c
++++ b/drivers/net/wireless/rt2x00/rt2800pci.c
+@@ -603,7 +603,7 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
+ 		rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
+ 		break;
+ 	case 2:
+-		rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 16);
++		rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
+ 		break;
+ 	case 3:
+ 		/* Do nothing */
+@@ -653,6 +653,7 @@ static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
+ }
+ 
+ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
++				     struct ieee80211_conf *conf,
+ 				     struct rf_channel *rf,
+ 				     struct channel_info *info)
+ {
+@@ -660,34 +661,20 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
+ 	unsigned int tx_pin;
+ 	u16 eeprom;
+ 
+-	tx_pin = 0;
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
+-	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
+-
+ 	rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
+ 
+ 	/*
+ 	 * Determine antenna settings from EEPROM
+ 	 */
+ 	rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
++
+ 	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1) {
+ 		rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
+-		/* Turn off unused PA or LNA when only 1T or 1R */
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 0);
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 0);
+ 	}
+ 
+ 	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1) {
+ 		rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
+ 		rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
+-		/* Turn off unused PA or LNA when only 1T or 1R */
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 0);
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 0);
+ 	} else if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 2)
+ 		rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
+ 
+@@ -715,19 +702,14 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
+ 
+ 		rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
+ 				   TXPOWER_A_TO_DEV(info->tx_power2));
+-
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, 1);
+ 	} else {
+ 		rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
+ 				   TXPOWER_G_TO_DEV(info->tx_power1));
+ 		rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
+ 				   TXPOWER_G_TO_DEV(info->tx_power2));
+-
+-		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1);
+ 	}
+ 
+-	rt2x00_set_field32(&rf->rf4, RF4_BW40,
+-			   test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags));
++	rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
+ 
+ 	rt2800pci_rf_write(rt2x00dev, 1, rf->rf1);
+ 	rt2800pci_rf_write(rt2x00dev, 2, rf->rf2);
+@@ -764,11 +746,6 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
+ 			rt2800pci_bbp_write(rt2x00dev, 82, 0x84);
+ 			rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
+ 		}
+-
+-		rt2x00pci_register_read(rt2x00dev, TX_BAND_CFG, &reg);
+-		rt2x00_set_field32(&rf->rf3, TX_BAND_CFG_A, 0);
+-		rt2x00_set_field32(&rf->rf3, TX_BAND_CFG_BG, 1);
+-		rt2x00pci_register_write(rt2x00dev, TX_BAND_CFG, reg);
+ 	} else {
+ 		rt2800pci_bbp_write(rt2x00dev, 82, 0xf2);
+ 
+@@ -776,13 +753,35 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
+ 			rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
+ 		else
+ 			rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
++	}
+ 
+-		rt2x00pci_register_read(rt2x00dev, TX_BAND_CFG, &reg);
+-		rt2x00_set_field32(&rf->rf3, TX_BAND_CFG_A, 1);
+-		rt2x00_set_field32(&rf->rf3, TX_BAND_CFG_BG, 0);
+-		rt2x00pci_register_write(rt2x00dev, TX_BAND_CFG, reg);
++	rt2x00pci_register_read(rt2x00dev, TX_BAND_CFG, &reg);
++	rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
++	rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
++	rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
++	rt2x00pci_register_write(rt2x00dev, TX_BAND_CFG, reg);
++
++	tx_pin = 0;
++
++	/* Turn on unused PA or LNA when not using 1T or 1R */
++	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) != 1) {
++		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
++		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
++	}
++
++	/* Turn on unused PA or LNA when not using 1T or 1R */
++	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) != 1) {
++		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
++		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
+ 	}
+ 
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
++	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
++
+ 	rt2x00pci_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
+ 
+ 	msleep(1);
+@@ -917,8 +916,8 @@ static void rt2800pci_config(struct rt2x00_dev *rt2x00dev,
+ 	rt2800pci_config_lna_gain(rt2x00dev, libconf);
+ 
+ 	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
+-		rt2800pci_config_channel(rt2x00dev, &libconf->rf,
+-					 &libconf->channel);
++		rt2800pci_config_channel(rt2x00dev, libconf->conf,
++					 &libconf->rf, &libconf->channel);
+ 	if (flags & IEEE80211_CONF_CHANGE_POWER)
+ 		rt2800pci_config_txpower(rt2x00dev, libconf->conf->power_level);
+ 	if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
+@@ -2724,14 +2723,14 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
+ 
+ static const struct data_queue_desc rt2800pci_queue_rx = {
+ 	.entry_num		= RX_ENTRIES,
+-	.data_size		= DATA_FRAME_SIZE,
++	.data_size		= AGGREGATION_SIZE,
+ 	.desc_size		= RXD_DESC_SIZE,
+ 	.priv_size		= sizeof(struct queue_entry_priv_pci),
+ };
+ 
+ static const struct data_queue_desc rt2800pci_queue_tx = {
+ 	.entry_num		= TX_ENTRIES,
+-	.data_size		= DATA_FRAME_SIZE,
++	.data_size		= AGGREGATION_SIZE,
+ 	.desc_size		= TXD_DESC_SIZE,
+ 	.priv_size		= sizeof(struct queue_entry_priv_pci),
+ };
+diff --git a/drivers/net/wireless/rt2x00/rt2800pci.h b/drivers/net/wireless/rt2x00/rt2800pci.h
+index 39f045c..0682a6a 100644
+--- a/drivers/net/wireless/rt2x00/rt2800pci.h
++++ b/drivers/net/wireless/rt2x00/rt2800pci.h
+@@ -791,6 +791,7 @@
+  * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
+  */
+ #define TX_BAND_CFG			0x132c
++#define TX_BAND_CFG_HT40_PLUS		FIELD32(0x00000001)
+ #define TX_BAND_CFG_A			FIELD32(0x00000002)
+ #define TX_BAND_CFG_BG			FIELD32(0x00000004)
+ 
+@@ -1496,7 +1497,7 @@ struct mac_iveiv_entry {
+ #define RF4_TXPOWER_A_7DBM_BOOST	FIELD32(0x00000040)
+ #define RF4_TXPOWER_A			FIELD32(0x00000780)
+ #define RF4_FREQ_OFFSET			FIELD32(0x001f8000)
+-#define RF4_BW40			FIELD32(0x00200000)
++#define RF4_HT40			FIELD32(0x00200000)
+ 
+ /*
+  * EEPROM content.
+-- 
+1.6.0
+