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author | Zoltan Herpai <wigyori@uid0.hu> | 2016-11-23 19:41:24 +0100 |
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committer | GitHub <noreply@github.com> | 2016-11-23 19:41:24 +0100 |
commit | fee8b58d42c5b155d91929a2148033eac0b26018 (patch) | |
tree | 90c6e6efe69a480f1ed9cb7ded42548fab0ef4c2 /package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch | |
parent | 10ccba1ba8759e1f1bbfb5471e9fe6b197979139 (diff) | |
parent | 9e2f8fa1e5df297c172ce1472eb076c3c0b27cad (diff) | |
download | master-187ad058-fee8b58d42c5b155d91929a2148033eac0b26018.tar.gz master-187ad058-fee8b58d42c5b155d91929a2148033eac0b26018.tar.bz2 master-187ad058-fee8b58d42c5b155d91929a2148033eac0b26018.zip |
Merge pull request #241 from wigyori/sunxi-uboot-fixes
uboot-sunxi: fix default config for OLIMEX A13 SOM
Diffstat (limited to 'package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch')
-rw-r--r-- | package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch b/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch index e6af765cae..d200633bc2 100644 --- a/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch +++ b/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch @@ -16,8 +16,6 @@ order of magnitude as Boot1. Furthermore, a bit of documentation is added to clarify that the required setting for the PLL LDO is 1.37v as per the A31 manual. -diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c -index fa7ebd8..3a6e56e 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c @@ -24,14 +24,27 @@ void clock_init_safe(void) @@ -49,9 +47,7 @@ index fa7ebd8..3a6e56e 100644 + clock_set_pll1(408000000); - writel(AHB1_ABP1_DIV_DEFAULT, &ccm->ahb1_apb1_div); -diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h -index 82ed541..41a62a4 100644 + writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); --- a/arch/arm/include/asm/arch-sunxi/prcm.h +++ b/arch/arm/include/asm/arch-sunxi/prcm.h @@ -111,13 +111,13 @@ @@ -72,6 +68,3 @@ index 82ed541..41a62a4 100644 __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 30) + 1160) #define PRCM_PLL_CTRL_LDO_KEY (0xa7 << 24) #define PRCM_PLL_CTRL_LDO_KEY_MASK (0xff << 24) --- -cgit v0.10.2 - |