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authorZoltan HERPAI <wigyori@uid0.hu>2016-06-24 14:48:56 +0200
committerZoltan HERPAI <wigyori@uid0.hu>2016-06-24 14:48:56 +0200
commite496316324925a978037f298c7b978ef97e13e7e (patch)
tree9aa53e776f54946cafa429bed9c44fa6a86521fc
parent2b3bd24865f38e6a505f594375f5dc1cd0f6c09e (diff)
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uboot-lantiq: VGV7510KW22 - use ddr ram params from brnboot
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
-rw-r--r--package/boot/uboot-lantiq/patches/0043-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch8
1 files changed, 4 insertions, 4 deletions
diff --git a/package/boot/uboot-lantiq/patches/0043-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch b/package/boot/uboot-lantiq/patches/0043-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch
index adb894f018..5b1cb9de65 100644
--- a/package/boot/uboot-lantiq/patches/0043-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch
+++ b/package/boot/uboot-lantiq/patches/0043-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch
@@ -220,7 +220,7 @@
+#define MC_CCR28_VALUE 0x0
+#define MC_CCR29_VALUE 0x0
+#define MC_CCR30_VALUE 0x798
-+#define MC_CCR31_VALUE 0x0
++#define MC_CCR31_VALUE 0x2040F
+#define MC_CCR32_VALUE 0x0
+#define MC_CCR33_VALUE 0x650000
+#define MC_CCR34_VALUE 0x200C8
@@ -236,7 +236,7 @@
+#define MC_CCR44_VALUE 0x566504
+#define MC_CCR45_VALUE 0x565F17
+#define MC_CCR46_VALUE 0x565F17
-+#define MC_CCR47_VALUE 0x0
++#define MC_CCR47_VALUE 0x2040F
+#define MC_CCR48_VALUE 0x0
+#define MC_CCR49_VALUE 0x0
+#define MC_CCR50_VALUE 0x0
@@ -253,10 +253,10 @@
+#define MC_CCR61_VALUE 0x4
--- a/boards.cfg
+++ b/boards.cfg
-@@ -542,6 +542,9 @@
+@@ -531,6 +531,9 @@ Active mips mips32 incai
+ Active mips mips32 incaip - incaip incaip_100MHz incaip:CPU_CLOCK_RATE=100000000 Wolfgang Denk <wd@denx.de>
Active mips mips32 incaip - incaip incaip_133MHz incaip:CPU_CLOCK_RATE=133000000 Wolfgang Denk <wd@denx.de>
Active mips mips32 incaip - incaip incaip_150MHz incaip:CPU_CLOCK_RATE=150000000 Wolfgang Denk <wd@denx.de>
- Active mips mips32 vrx200 arcadyan easybox904 easybox904_ram easybox904:SYS_BOOT_RAM Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
+Active mips mips32 vrx200 arcadyan vgv7510kw22 vgv7510kw22_brn vgv7510kw22:SYS_BOOT_BRN Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Active mips mips32 vrx200 arcadyan vgv7510kw22 vgv7510kw22_nor vgv7510kw22:SYS_BOOT_NOR Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Active mips mips32 vrx200 arcadyan vgv7510kw22 vgv7510kw22_ram vgv7510kw22:SYS_BOOT_RAM Martin Blumenstingl <martin.blumenstingl@googlemail.com>