diff options
| author | John Crispin <blogic@openwrt.org> | 2015-11-24 18:28:54 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-11-24 18:28:54 +0000 |
| commit | b7eec4c0a84f7e76dea67437f7fac406e29db1e4 (patch) | |
| tree | 5d5fa330ed99e88605aa129debb117fdccc48fc5 | |
| parent | 96e4e6b3f014b2841cf11172f4a9f7564a719c36 (diff) | |
| download | master-187ad058-b7eec4c0a84f7e76dea67437f7fac406e29db1e4.tar.gz master-187ad058-b7eec4c0a84f7e76dea67437f7fac406e29db1e4.tar.bz2 master-187ad058-b7eec4c0a84f7e76dea67437f7fac406e29db1e4.zip | |
ramips: add second spi master sysclk
for mt7620, rt3883 and rt5350
Signed-off-by: Michael Lee <igvtee@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47616 3c298f89-4303-0410-b956-a3cf2f4a3e73
| -rw-r--r-- | target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch b/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch new file mode 100644 index 0000000000..dffec5e9e7 --- /dev/null +++ b/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -434,6 +434,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", periph_rate); + ralink_clk_add("10000d00.uart1", periph_rate); + ralink_clk_add("10000e00.uart2", periph_rate); +--- a/arch/mips/ralink/rt305x.c ++++ b/arch/mips/ralink/rt305x.c +@@ -199,6 +199,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000100.timer", wdt_rate); + ralink_clk_add("10000120.watchdog", wdt_rate); + ralink_clk_add("10000500.uart", uart_rate); +--- a/arch/mips/ralink/rt3883.c ++++ b/arch/mips/ralink/rt3883.c +@@ -109,6 +109,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000120.watchdog", sys_rate); + ralink_clk_add("10000500.uart", 40000000); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", 40000000); + ralink_clk_add("10100000.ethernet", sys_rate); + ralink_clk_add("10180000.wmac", 40000000); |