diff options
author | John Crispin <blogic@openwrt.org> | 2015-08-17 06:03:57 +0000 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2015-08-17 06:03:57 +0000 |
commit | 46d4c7a7d0d49edaf79b8f92e9c1b54405e56157 (patch) | |
tree | 54c265fd011c147f0febcb7c86c0163df9747ec2 | |
parent | d3ea787445646907237906a5c33c49fed6a95a68 (diff) | |
download | master-187ad058-46d4c7a7d0d49edaf79b8f92e9c1b54405e56157.tar.gz master-187ad058-46d4c7a7d0d49edaf79b8f92e9c1b54405e56157.tar.bz2 master-187ad058-46d4c7a7d0d49edaf79b8f92e9c1b54405e56157.zip |
oxnas: prepare for kernel 4.1
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46636 3c298f89-4303-0410-b956-a3cf2f4a3e73
15 files changed, 788 insertions, 1 deletions
diff --git a/target/linux/oxnas/config-4.1 b/target/linux/oxnas/config-4.1 new file mode 100644 index 0000000000..29c194cfb4 --- /dev/null +++ b/target/linux/oxnas/config-4.1 @@ -0,0 +1,374 @@ +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OXNAS=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_LIBATA_LEDS=y +CONFIG_ARM=y +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARM_CPU_SUSPEND is not set +CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 +CONFIG_ARM_DMA_USE_IOMMU=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_CCI400_PMU is not set +CONFIG_ARM_SMMU=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ATA_LEDS=y +CONFIG_AUTO_ZRELADDR=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_SD=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +# CONFIG_CACHE_L2X0 is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_RPS_TIMER=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="console=ttyS0,115200n8 earlyprintk=serial" +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_PWM is not set +CONFIG_COMPACTION=y +CONFIG_CONSOLE_POLL=y +CONFIG_COREDUMP=y +CONFIG_CPU_32v6=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_ABRT_EV6=y +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_HAS_ASID=y +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_PABRT_V6=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_V6K=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_XZ=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ICEDCC=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_INCLUDE="debug/icedcc.S" +# CONFIG_DEBUG_UART_8250 is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=8 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DIRECT_IO=y +CONFIG_DMADEVICES=y +CONFIG_DMA_CACHE_FIQ_BROADCAST=y +# CONFIG_DMA_CACHE_RWFO is not set +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +# CONFIG_DW_DMAC_PCI is not set +CONFIG_EARLY_PRINTK=y +CONFIG_FIQ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_SYSFS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SMP=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HOTPLUG_CPU=y +# CONFIG_HSU_DMA_PCI is not set +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_ICPLUS_PHY=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_UDP_DIAG=y +CONFIG_INPUT=y +# CONFIG_INPUT_MISC is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_HELPER=y +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +CONFIG_IOMMU_SUPPORT=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_BOOTP is not set +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y +# CONFIG_ISDN is not set +# CONFIG_JFFS2_FS is not set +CONFIG_JUMP_LABEL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KGDB=y +# CONFIG_KGDB_KDB is not set +CONFIG_KGDB_SERIAL_CONSOLE=y +# CONFIG_KGDB_TESTS is not set +# CONFIG_LDM_DEBUG is not set +CONFIG_LDM_PARTITION=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LIBFDT=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZ4_COMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MACH_OX820=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +CONFIG_MDIO_BOARDINFO=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_MIGRATION=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MODULE_STRIPPED is not set +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_OXNAS=y +CONFIG_MTD_NAND_PLATFORM=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UIMAGE_SPLIT=y +CONFIG_MULTI_IRQ_HANDLER=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NLS=y +CONFIG_NO_BOOTMEM=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=2 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IOMMU=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_MTD=y +CONFIG_OF_NET=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_PACKET_DIAG=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_IPROC is not set +CONFIG_PCIE_PME=y +# CONFIG_PCI_DOMAINS_GENERIC is not set +CONFIG_PCI_OXNAS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_OXNAS=y +CONFIG_PLXTECH_RPS=y +CONFIG_PM=y +CONFIG_PM_CLK=y +# CONFIG_PM_DEBUG is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +CONFIG_POWER_RESET_GPIO=y +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_SYSCON is not set +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +# CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_SYSFS=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_STALL_COMMON=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER_OXNAS=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_CMOS is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SCHED_HRTICK=y +CONFIG_SCSI=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +# CONFIG_SERIAL_KGDB_NMI is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOCK_DIAG=y +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_STOP_MACHINE=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_SWIOTLB=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TREE_RCU=y +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_XZ=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UID16=y +CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_SUPPORT=y +# CONFIG_USB_UHCI_HCD is not set +CONFIG_USE_OF=y +CONFIG_VECTORS_BASE=0xffff0000 +# CONFIG_VFIO is not set +# CONFIG_VFP is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_XPS=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/oxnas/files/drivers/usb/host/ehci-oxnas.c b/target/linux/oxnas/files/drivers/usb/host/ehci-oxnas.c index dae5589c50..15578a3027 100644 --- a/target/linux/oxnas/files/drivers/usb/host/ehci-oxnas.c +++ b/target/linux/oxnas/files/drivers/usb/host/ehci-oxnas.c @@ -232,7 +232,7 @@ static int ehci_oxnas_drv_probe(struct platform_device *ofdev) start_oxnas_usb_ehci(oxnas); - err = usb_add_hcd(hcd, irq, IRQF_SHARED | IRQF_DISABLED); + err = usb_add_hcd(hcd, irq, IRQF_SHARED); if (err) goto err_hcd; diff --git a/target/linux/oxnas/patches-4.1/010-arm_introduce-dma-fiq-irq-broadcast.patch b/target/linux/oxnas/patches-4.1/010-arm_introduce-dma-fiq-irq-broadcast.patch new file mode 100644 index 0000000000..65ef6bc5e6 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/010-arm_introduce-dma-fiq-irq-broadcast.patch @@ -0,0 +1,56 @@ +--- a/arch/arm/include/asm/glue-cache.h ++++ b/arch/arm/include/asm/glue-cache.h +@@ -156,11 +156,19 @@ static inline void nop_dma_unmap_area(co + #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) + #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) + #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) ++#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST + #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) + + #define dmac_map_area __glue(_CACHE,_dma_map_area) + #define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) + #define dmac_flush_range __glue(_CACHE,_dma_flush_range) ++#else ++#define __cpuc_flush_dcache_area __glue(fiq,_flush_kern_dcache_area) ++ ++#define dmac_map_area __glue(fiq,_dma_map_area) ++#define dmac_unmap_area __glue(fiq,_dma_unmap_area) ++#define dmac_flush_range __glue(fiq,_dma_flush_range) ++#endif /* CONFIG_DMA_CACHE_FIQ_BROADCAST */ + #endif + + #endif +--- a/arch/arm/mm/Kconfig ++++ b/arch/arm/mm/Kconfig +@@ -858,6 +858,17 @@ config DMA_CACHE_RWFO + in hardware, other workarounds are needed (e.g. cache + maintenance broadcasting in software via FIQ). + ++config DMA_CACHE_FIQ_BROADCAST ++ bool "Enable fiq broadcast DMA cache maintenance" ++ depends on CPU_V6K && SMP ++ select FIQ ++ help ++ The Snoop Control Unit on ARM11MPCore does not detect the ++ cache maintenance operations and the dma_{map,unmap}_area() ++ functions may leave stale cache entries on other CPUs. By ++ enabling this option, fiq broadcast in the ARMv6 ++ DMA cache maintenance functions is performed. ++ + config OUTER_CACHE + bool + +--- a/arch/arm/mm/flush.c ++++ b/arch/arm/mm/flush.c +@@ -314,7 +314,11 @@ void flush_dcache_page(struct page *page + + mapping = page_mapping(page); + ++#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST + if (!cache_ops_need_broadcast() && ++#else ++ if ( ++#endif + mapping && !page_mapped(page)) + clear_bit(PG_dcache_clean, &page->flags); + else { diff --git a/target/linux/oxnas/patches-4.1/250-add-plxtech-vendor-prefix.patch b/target/linux/oxnas/patches-4.1/250-add-plxtech-vendor-prefix.patch new file mode 100644 index 0000000000..c43d03ed79 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/250-add-plxtech-vendor-prefix.patch @@ -0,0 +1,10 @@ +--- a/Documentation/devicetree/bindings/vendor-prefixes.txt ++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt +@@ -149,6 +149,7 @@ pericom Pericom Technology Inc. + phytec PHYTEC Messtechnik GmbH + picochip Picochip Ltd + plathome Plat'Home Co., Ltd. ++plxtech PLX Technology, Inc. + pixcir PIXCIR MICROELECTRONICS Co., Ltd + powervr PowerVR (deprecated, use img) + qca Qualcomm Atheros, Inc. diff --git a/target/linux/oxnas/patches-4.1/300-introduce-oxnas-platform.patch b/target/linux/oxnas/patches-4.1/300-introduce-oxnas-platform.patch new file mode 100644 index 0000000000..d96633db71 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/300-introduce-oxnas-platform.patch @@ -0,0 +1,70 @@ +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -599,6 +599,18 @@ config ARCH_LPC32XX + help + Support for the NXP LPC32XX family of processors + ++config ARCH_OXNAS ++ bool "Oxford Semiconductor 815/820/825 NAS SoC" ++ select ARCH_REQUIRE_GPIOLIB ++ select CLKDEV_LOOKUP ++ select GENERIC_CLOCKEVENTS ++ select COMMON_CLK ++ select MIGHT_HAVE_PCI ++ select ARCH_HAS_RESET_CONTROLLER ++ help ++ This enables support for Oxford 815/820/825 NAS SoC ++ later renamed to PLXTECH NAS782x. ++ + config ARCH_PXA + bool "PXA2xx/PXA3xx-based" + depends on MMU +@@ -897,6 +909,8 @@ source "arch/arm/mach-omap2/Kconfig" + + source "arch/arm/mach-orion5x/Kconfig" + ++source "arch/arm/mach-oxnas/Kconfig" ++ + source "arch/arm/mach-picoxcell/Kconfig" + + source "arch/arm/mach-pxa/Kconfig" +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -187,6 +187,7 @@ machine-$(CONFIG_ARCH_NSPIRE) += nspire + machine-$(CONFIG_ARCH_OMAP1) += omap1 + machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 + machine-$(CONFIG_ARCH_ORION5X) += orion5x ++machine-$(CONFIG_ARCH_OXNAS) += oxnas + machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell + machine-$(CONFIG_ARCH_PXA) += pxa + machine-$(CONFIG_ARCH_QCOM) += qcom +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \ + orion5x-lacie-ethernet-disk-mini-v2.dtb \ + orion5x-maxtor-shared-storage-2.dtb \ + orion5x-rd88f5182-nas.dtb ++dtb-$(CONFIG_ARCH_OXNAS) += ox820-pogoplug-pro.dtb + dtb-$(CONFIG_ARCH_PRIMA2) += \ + prima2-evb.dtb + dtb-$(CONFIG_ARCH_QCOM) += \ +--- a/arch/arm/tools/mach-types ++++ b/arch/arm/tools/mach-types +@@ -228,6 +228,7 @@ edb9302a MACH_EDB9302A EDB9302A 1127 + edb9307a MACH_EDB9307A EDB9307A 1128 + omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 + vstms MACH_VSTMS VSTMS 1140 ++ox820 MACH_OX820 OX820 1152 + micro9m MACH_MICRO9M MICRO9M 1169 + bug MACH_BUG BUG 1179 + at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -32,6 +32,7 @@ obj-$(CONFIG_ARCH_MB86S7X) += clk-mb86s + obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o + obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o + obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o ++obj-$(CONFIG_ARCH_OXNAS) += clk-oxnas.o + obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o + obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o + obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o diff --git a/target/linux/oxnas/patches-4.1/310-oxnas-clocksource.patch b/target/linux/oxnas/patches-4.1/310-oxnas-clocksource.patch new file mode 100644 index 0000000000..3699b7a5b8 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/310-oxnas-clocksource.patch @@ -0,0 +1,25 @@ +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -177,6 +177,12 @@ config VF_PIT_TIMER + help + Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. + ++config CLKSRC_RPS_TIMER ++ def_bool y if ARCH_OXNAS ++ select CLKSRC_MMIO ++ help ++ This option enables support for the oxnas rps timers. ++ + config SYS_SUPPORTS_SH_CMT + bool + +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -39,6 +39,7 @@ obj-$(CONFIG_CLKSRC_EFM32) += time-efm32 + obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o + obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o + obj-$(CONFIG_FSL_FTM_TIMER) += fsl_ftm_timer.o ++obj-$(CONFIG_CLKSRC_RPS_TIMER) += oxnas_rps_timer.o + obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o + obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o + obj-$(CONFIG_MTK_TIMER) += mtk_timer.o diff --git a/target/linux/oxnas/patches-4.1/320-oxnas-irqchip.patch b/target/linux/oxnas/patches-4.1/320-oxnas-irqchip.patch new file mode 100644 index 0000000000..d0833eaaf0 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/320-oxnas-irqchip.patch @@ -0,0 +1,34 @@ +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -27,6 +27,11 @@ config ARM_GIC_V3_ITS + bool + select PCI_MSI_IRQ_DOMAIN + ++config PLXTECH_RPS ++ def_bool y if ARHC_OXNAS ++ depends on ARCH_OXNAS ++ select IRQ_DOMAIN ++ + config ARM_NVIC + bool + select IRQ_DOMAIN +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -31,6 +31,7 @@ obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc. + obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o + obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o + obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o ++obj-$(CONFIG_PLXTECH_RPS) += irq-rps.o + obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o + obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o + obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o +--- a/drivers/irqchip/irq-gic.c ++++ b/drivers/irqchip/irq-gic.c +@@ -1036,6 +1036,7 @@ IRQCHIP_DECLARE(arm1176jzf_dc_gic, "arm, + IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); + IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init); + IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init); ++IRQCHIP_DECLARE(arm11_mpcore_gic, "arm,arm11mp-gic", gic_of_init); + IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); + IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); + diff --git a/target/linux/oxnas/patches-4.1/330-oxnas-pinctrl.patch b/target/linux/oxnas/patches-4.1/330-oxnas-pinctrl.patch new file mode 100644 index 0000000000..5e7d081e03 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/330-oxnas-pinctrl.patch @@ -0,0 +1,28 @@ +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -191,6 +191,15 @@ config PINCTRL_COH901 + COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 + ports of 8 GPIO pins each. + ++config PINCTRL_OXNAS ++ bool "OXNAS pinctrl driver" ++ depends on OF ++ depends on ARCH_OXNAS ++ select PINMUX ++ select PINCONF ++ help ++ Say Y here to enable the oxnas pinctrl driver ++ + config PINCTRL_PALMAS + bool "Pinctrl driver for the PALMAS Series MFD devices" + depends on OF && MFD_PALMAS +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at + obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o + obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o + obj-$(CONFIG_PINCTRL_MESON) += meson/ ++obj-$(CONFIG_PINCTRL_OXNAS) += pinctrl-oxnas.o + obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o + obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o + obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o diff --git a/target/linux/oxnas/patches-4.1/340-oxnas-pcie.patch b/target/linux/oxnas/patches-4.1/340-oxnas-pcie.patch new file mode 100644 index 0000000000..ec9dc941a3 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/340-oxnas-pcie.patch @@ -0,0 +1,22 @@ +--- a/drivers/pci/host/Kconfig ++++ b/drivers/pci/host/Kconfig +@@ -125,4 +125,9 @@ config PCIE_IPROC_PLATFORM + Say Y here if you want to use the Broadcom iProc PCIe controller + through the generic platform bus interface + ++config PCI_OXNAS ++ bool "PLX Oxnas PCIe controller" ++ depends on ARCH_OXNAS ++ select PCIEPORTBUS ++ + endmenu +--- a/drivers/pci/host/Makefile ++++ b/drivers/pci/host/Makefile +@@ -3,6 +3,7 @@ obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o + obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o + obj-$(CONFIG_PCI_IMX6) += pci-imx6.o + obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o ++obj-$(CONFIG_PCI_OXNAS) += pcie-oxnas.o + obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o + obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o + obj-$(CONFIG_PCI_RCAR_GEN2_PCIE) += pcie-rcar.o diff --git a/target/linux/oxnas/patches-4.1/350-oxnas-reset.patch b/target/linux/oxnas/patches-4.1/350-oxnas-reset.patch new file mode 100644 index 0000000000..1cecd28dc7 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/350-oxnas-reset.patch @@ -0,0 +1,20 @@ +--- a/drivers/reset/Kconfig ++++ b/drivers/reset/Kconfig +@@ -12,4 +12,9 @@ menuconfig RESET_CONTROLLER + + If unsure, say no. + ++config RESET_CONTROLLER_OXNAS ++ bool ++ select RESET_CONTROLLER ++ + source "drivers/reset/sti/Kconfig" ++ +--- a/drivers/reset/Makefile ++++ b/drivers/reset/Makefile +@@ -1,4 +1,5 @@ + obj-$(CONFIG_RESET_CONTROLLER) += core.o ++obj-$(CONFIG_RESET_CONTROLLER_OXNAS) += reset-ox820.o + obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o + obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o + obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o diff --git a/target/linux/oxnas/patches-4.1/400-oxnas-nand.patch b/target/linux/oxnas/patches-4.1/400-oxnas-nand.patch new file mode 100644 index 0000000000..c59da359ba --- /dev/null +++ b/target/linux/oxnas/patches-4.1/400-oxnas-nand.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -530,4 +530,12 @@ config MTD_NAND_HISI504 + help + Enables support for NAND controller on Hisilicon SoC Hip04. + ++config MTD_NAND_OXNAS ++ tristate "Support for NAND on Plxtech NAS782X SoC" ++ depends on ARCH_OXNAS ++ select MTD_NAND_PLATFORM ++ help ++ Enables support for NAND Flash chips on Plxtech NAS782X SoCs. NAND is attached ++ to the STATIC Unit. ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -45,6 +45,7 @@ obj-$(CONFIG_MTD_NAND_SOCRATES) += socr + obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o + obj-$(CONFIG_MTD_NAND_NUC900) += nuc900_nand.o + obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o ++obj-$(CONFIG_MTD_NAND_OXNAS) += oxnas_nand.o + obj-$(CONFIG_MTD_NAND_RICOH) += r852.o + obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o + obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/ diff --git a/target/linux/oxnas/patches-4.1/500-oxnas-sata.patch b/target/linux/oxnas/patches-4.1/500-oxnas-sata.patch new file mode 100644 index 0000000000..8c59b219fd --- /dev/null +++ b/target/linux/oxnas/patches-4.1/500-oxnas-sata.patch @@ -0,0 +1,26 @@ +--- a/drivers/ata/Kconfig ++++ b/drivers/ata/Kconfig +@@ -402,6 +402,13 @@ config SATA_VITESSE + + If unsure, say N. + ++config SATA_OXNAS ++ tristate "PLXTECH NAS782X SATA support" ++ help ++ This option enables support for Nas782x Serial ATA controller. ++ ++ If unsure, say N. ++ + comment "PATA SFF controllers with BMDMA" + + config PATA_ALI +--- a/drivers/ata/Makefile ++++ b/drivers/ata/Makefile +@@ -37,6 +37,7 @@ obj-$(CONFIG_SATA_SVW) += sata_svw.o + obj-$(CONFIG_SATA_ULI) += sata_uli.o + obj-$(CONFIG_SATA_VIA) += sata_via.o + obj-$(CONFIG_SATA_VITESSE) += sata_vsc.o ++obj-$(CONFIG_SATA_OXNAS) += sata_oxnas.o + + # SFF PATA w/ BMDMA + obj-$(CONFIG_PATA_ALI) += pata_ali.o diff --git a/target/linux/oxnas/patches-4.1/800-oxnas-ehci.patch b/target/linux/oxnas/patches-4.1/800-oxnas-ehci.patch new file mode 100644 index 0000000000..b283bbd3f6 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/800-oxnas-ehci.patch @@ -0,0 +1,26 @@ +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -313,6 +313,13 @@ config USB_OCTEON_EHCI + USB 2.0 device support. All CN6XXX based chips with USB are + supported. + ++config USB_EHCI_OXNAS ++ tristate "OXNAS EHCI Module" ++ depends on USB_EHCI_HCD && ARCH_OXNAS ++ select USB_EHCI_ROOT_HUB_TT ++ ---help--- ++ Enable support for the OX820 SOC's on-chip EHCI controller. ++ + endif # USB_EHCI_HCD + + config USB_OXU210HP_HCD +--- a/drivers/usb/host/Makefile ++++ b/drivers/usb/host/Makefile +@@ -42,6 +42,7 @@ obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci- + obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o + obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o + obj-$(CONFIG_USB_W90X900_EHCI) += ehci-w90x900.o ++obj-$(CONFIG_USB_EHCI_OXNAS) += ehci-oxnas.o + + obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o + obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o diff --git a/target/linux/oxnas/patches-4.1/900-more-boards.patch b/target/linux/oxnas/patches-4.1/900-more-boards.patch new file mode 100644 index 0000000000..af4831eb01 --- /dev/null +++ b/target/linux/oxnas/patches-4.1/900-more-boards.patch @@ -0,0 +1,14 @@ +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -442,7 +442,10 @@ dtb-$(CONFIG_ARCH_ORION5X) += \ + orion5x-lacie-ethernet-disk-mini-v2.dtb \ + orion5x-maxtor-shared-storage-2.dtb \ + orion5x-rd88f5182-nas.dtb +-dtb-$(CONFIG_ARCH_OXNAS) += ox820-pogoplug-pro.dtb ++dtb-$(CONFIG_ARCH_OXNAS) += ox820-pogoplug-pro.dtb \ ++ ox820-pogoplug-v3.dtb \ ++ ox820-stg212.dtb \ ++ ox820-kd20.dtb + dtb-$(CONFIG_ARCH_PRIMA2) += \ + prima2-evb.dtb + dtb-$(CONFIG_ARCH_QCOM) += \ diff --git a/target/linux/oxnas/patches-4.1/999-libata-hacks.patch b/target/linux/oxnas/patches-4.1/999-libata-hacks.patch new file mode 100644 index 0000000000..c298f7561e --- /dev/null +++ b/target/linux/oxnas/patches-4.1/999-libata-hacks.patch @@ -0,0 +1,57 @@ +--- a/drivers/ata/libata-core.c ++++ b/drivers/ata/libata-core.c +@@ -1589,6 +1589,14 @@ unsigned ata_exec_internal_sg(struct ata + return AC_ERR_SYSTEM; + } + ++ if (ap->ops->acquire_hw && !ap->ops->acquire_hw(ap, 0, 0)) { ++ spin_unlock_irqrestore(ap->lock, flags); ++ if (!ap->ops->acquire_hw(ap, 1, (2*HZ))) { ++ return AC_ERR_TIMEOUT; ++ } ++ spin_lock_irqsave(ap->lock, flags); ++ } ++ + /* initialize internal qc */ + + /* XXX: Tag 0 is used for drivers with legacy EH as some +@@ -4781,6 +4789,9 @@ struct ata_queued_cmd *ata_qc_new_init(s + if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) + return NULL; + ++ if (ap->ops->qc_new && ap->ops->qc_new(ap)) ++ return NULL; ++ + /* libsas case */ + if (ap->flags & ATA_FLAG_SAS_HOST) { + tag = ata_sas_allocate_tag(ap); +@@ -4826,6 +4837,8 @@ void ata_qc_free(struct ata_queued_cmd * + qc->tag = ATA_TAG_POISON; + if (ap->flags & ATA_FLAG_SAS_HOST) + ata_sas_free_tag(tag, ap); ++ if (ap->ops->qc_free) ++ ap->ops->qc_free(qc); + } + } + +--- a/include/linux/libata.h ++++ b/include/linux/libata.h +@@ -902,6 +902,8 @@ struct ata_port_operations { + void (*qc_prep)(struct ata_queued_cmd *qc); + unsigned int (*qc_issue)(struct ata_queued_cmd *qc); + bool (*qc_fill_rtf)(struct ata_queued_cmd *qc); ++ int (*qc_new)(struct ata_port *ap); ++ void (*qc_free)(struct ata_queued_cmd *qc); + + /* + * Configuration and exception handling +@@ -992,6 +994,9 @@ struct ata_port_operations { + void (*phy_reset)(struct ata_port *ap); + void (*eng_timeout)(struct ata_port *ap); + ++ int (*acquire_hw)(struct ata_port *ap, int may_sleep, ++ int timeout_jiffies); ++ + /* + * ->inherits must be the last field and all the preceding + * fields must be pointers. |