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authorGabor Juhos <juhosg@openwrt.org>2013-12-23 17:05:23 +0000
committerGabor Juhos <juhosg@openwrt.org>2013-12-23 17:05:23 +0000
commit18e825e907b0e8921aa1851f0aa4ac1d29d5be58 (patch)
treeaa91fb75070ea8ec86d86aa4dde29c9dbf561113
parent01fe21d1963ba7c904afb4e18a57e89cf9d50f0c (diff)
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ar71xx: fix max frame length of the QCA955x SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39161 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 17b3ec4a6d..21feeb9ad3 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -981,6 +981,17 @@ void __init ath79_register_eth(unsigned int id)
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
+ /*
+ * Limit the maximum frame length to 4095 bytes.
+ * Although the documentation says that the hardware
+ * limit is 16383 bytes but that does not work in
+ * practice. It seems that the hardware only updates
+ * the lowest 12 bits of the packet length field
+ * in the RX descriptor.
+ */
+ pdata->max_frame_len = SZ_4K - 1;
+ pdata->desc_pktlen_mask = SZ_16K - 1;
+
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)