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authorroot <root@no.no.james.local>2015-09-07 23:40:11 +0100
committerroot <root@no.no.james.local>2015-09-07 23:40:11 +0100
commit8f7b23cea60eca5b359897bfc21ed84eb11a7bb5 (patch)
tree49810ddc616fcce444176b2ff181600f82840ae6 /crypto/gt22l16a1y.c
parentb83365010e8338a41988426f879243208714c44f (diff)
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Diffstat (limited to 'crypto/gt22l16a1y.c')
-rw-r--r--crypto/gt22l16a1y.c109
1 files changed, 109 insertions, 0 deletions
diff --git a/crypto/gt22l16a1y.c b/crypto/gt22l16a1y.c
new file mode 100644
index 0000000..b997c36
--- /dev/null
+++ b/crypto/gt22l16a1y.c
@@ -0,0 +1,109 @@
+#include "project.h"
+
+#define SCLK 17
+#define MOSI 18
+#define NCS 19
+#define MISO 20
+
+#define READ 0x3
+#define FAST_READ 0xb
+
+
+static inline void d(void)
+{
+nrf_delay_us(1);
+}
+
+void
+gt_init (void)
+{
+ NRF_GPIO->PIN_CNF[SCLK] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+
+ NRF_GPIO->PIN_CNF[MOSI] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+
+
+ NRF_GPIO->PIN_CNF[NCS] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+
+
+
+ NRF_GPIO->PIN_CNF[MISO] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+
+
+ NRF_GPIO->DIRSET = (1 << MOSI) | (1 << NCS) | (1<<SCLK);
+ NRF_GPIO->DIRCLR = (1 << MISO);
+
+ NRF_GPIO->OUTSET = (1 << NCS) | (1<<MISO);
+}
+
+void gt_read(uint32_t a,uint8_t * buf,size_t len)
+{
+ uint32_t c;
+ uint8_t v;
+
+ NRF_GPIO->OUTCLR = (1 << SCLK);
+ d();
+ NRF_GPIO->OUTCLR = (1 << NCS);
+ NRF_GPIO->OUTSET = (1 << NCS);
+ d();
+
+ a |= READ << 24;
+
+ a=0x3000000;
+ a+=768+80;
+
+ for (c=0x80000000;c;c>>=1) {
+ if (c&a)
+ NRF_GPIO->OUTSET = (1 << MOSI);
+ else
+ NRF_GPIO->OUTCLR = (1 << MOSI);
+ d();
+
+ NRF_GPIO->OUTSET = (1 << SCLK);
+ d();
+ NRF_GPIO->OUTCLR = (1 << SCLK);
+ d();
+ }
+
+ while (len--) {
+ v=0;
+ for (c=0x80;c;c>>=1) {
+ if (NRF_GPIO->IN & (1<<MISO)) v|=c;
+
+
+
+ NRF_GPIO->OUTSET = (1 << SCLK);
+ d();
+ NRF_GPIO->OUTCLR = (1 << SCLK);
+ d();
+ }
+ *(buf++)=v;
+ }
+
+ d();
+
+ NRF_GPIO->OUTSET = (1 << NCS);
+ d();
+
+
+}
+