blob: 4866198ae0af34b0586f8489841d04d6a026f13a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
/** @defgroup ethernet_phy_file PHY Generic Drivers
*
* @ingroup ETH
*
* @brief <b>Ethernet PHY Generic Drivers</b>
*
* @version 1.0.0
* @author @htmlonly © @endhtmlonly 2013 Frantisek Burian <BuFran@seznam.cz>
*
* @date 1 September 2013
*
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/ethernet/mac.h>
#include <libopencm3/ethernet/phy.h>
/**@{*/
/*---------------------------------------------------------------------------*/
/** @brief Is the link up ?
*
* @returns bool true, if link is up
*/
bool phy_link_isup(void)
{
return eth_smi_read(1, PHY_REG_BSR) & PHY_REG_BSR_UP;
}
/*---------------------------------------------------------------------------*/
/** @brief Reset the PHY
*
* Reset the PHY chip and wait for done
*/
void phy_reset(void)
{
eth_smi_write(1, PHY_REG_BCR, PHY_REG_BCR_RESET);
while (eth_smi_read(1, PHY_REG_BCR) & PHY_REG_BCR_RESET);
}
/*---------------------------------------------------------------------------*/
/**@}*/
|