blob: ad64306bb737191e80aaf72923894c51f508ec28 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
#if defined(STM32F0)
# include <libopencmsis/stm32/f0/irqhandlers.h>
#elif defined(STM32F1)
# include <libopencmsis/stm32/f1/irqhandlers.h>
#elif defined(STM32F2)
# include <libopencmsis/stm32/f2/irqhandlers.h>
#elif defined(STM32F3)
# include <libopencmsis/stm32/f3/irqhandlers.h>
#elif defined(STM32F4)
# include <libopencmsis/stm32/f4/irqhandlers.h>
#elif defined(STM32L1)
# include <libopencmsis/stm32/l1/irqhandlers.h>
#elif defined(EFM32TG)
# include <libopencmsis/efm32/efm32tg/irqhandlers.h>
#elif defined(EFM32G)
# include <libopencmsis/efm32/efm32g/irqhandlers.h>
#elif defined(EFM32LG)
# include <libopencmsis/efm32/efm32lg/irqhandlers.h>
#elif defined(EFM32GG)
# include <libopencmsis/efm32/efm32gg/irqhandlers.h>
#elif defined(LPC13XX)
# include <libopencmsis/lpc13xx/irqhandlers.h>
#elif defined(LPC17XX)
# include <libopencmsis/lpc17xx/irqhandlers.h>
#elif defined(LPC43XX_M4)
# include <libopencmsis/lpc43xx/m4/irqhandlers.h>
#elif defined(LPC43XX_M0)
# include <libopencmsis/lpc43xx/m0/irqhandlers.h>
#elif defined(SAM3A)
# include <libopencmsis/sam/3a/irqhandlers.h>
#elif defined(SAM3N)
# include <libopencmsis/sam/3n/irqhandlers.h>
#elif defined(SAM3S)
# include <libopencmsis/sam/3s/irqhandlers.h>
#elif defined(SAM3U)
# include <libopencmsis/sam/3u/irqhandlers.h>
#elif defined(SAM3X)
# include <libopencmsis/sam/3x/irqhandlers.h>
#elif defined(LM3S) || defined(LM4F)
/* Yes, we use the same interrupt table for both LM3S and LM4F */
# include <libopencmsis/lm3s/irqhandlers.h>
#else
# warning"no chipset defined; user interrupts are not redirected"
#endif
|
