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-rw-r--r--libopencm3/include/libopencm3/stm32/l1/irq.json64
1 files changed, 64 insertions, 0 deletions
diff --git a/libopencm3/include/libopencm3/stm32/l1/irq.json b/libopencm3/include/libopencm3/stm32/l1/irq.json
new file mode 100644
index 0000000..abea8db
--- /dev/null
+++ b/libopencm3/include/libopencm3/stm32/l1/irq.json
@@ -0,0 +1,64 @@
+{
+ "irqs": [
+ "wwdg",
+ "pvd",
+ "tamper_stamp",
+ "rtc_wkup",
+ "flash",
+ "rcc",
+ "exti0",
+ "exti1",
+ "exti2",
+ "exti3",
+ "exti4",
+ "dma1_channel1",
+ "dma1_channel2",
+ "dma1_channel3",
+ "dma1_channel4",
+ "dma1_channel5",
+ "dma1_channel6",
+ "dma1_channel7",
+ "adc1",
+ "usb_hp",
+ "usb_lp",
+ "dac",
+ "comp",
+ "exti9_5",
+ "lcd",
+ "tim9",
+ "tim10",
+ "tim11",
+ "tim2",
+ "tim3",
+ "tim4",
+ "i2c1_ev",
+ "i2c1_er",
+ "i2c2_ev",
+ "i2c2_er",
+ "spi1",
+ "spi2",
+ "usart1",
+ "usart2",
+ "usart3",
+ "exti15_10",
+ "rtc_alarm",
+ "usb_fs_wakeup",
+ "tim6",
+ "tim7",
+ "sdio",
+ "tim5",
+ "spi3",
+ "uart4",
+ "uart5",
+ "dma2_ch1",
+ "dma2_ch2",
+ "dma2_ch3",
+ "dma2_ch4",
+ "dma2_ch5",
+ "aes",
+ "comp_acq"
+ ],
+ "partname_humanreadable": "STM32 L1 series",
+ "partname_doxygen": "STM32L1",
+ "includeguard": "LIBOPENCM3_STM32_L1_NVIC_H"
+} \ No newline at end of file