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diff --git a/libopencm3/include/libopencm3/lpc13xx/doc-lpc13xx.h b/libopencm3/include/libopencm3/lpc13xx/doc-lpc13xx.h
new file mode 100644
index 0000000..5ed7cae
--- /dev/null
+++ b/libopencm3/include/libopencm3/lpc13xx/doc-lpc13xx.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 LPC13xx
+
+@version 1.0.0
+
+@date 14 September 2012
+
+API documentation for NXP Semiconductors LPC13xx Cortex M3 series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LPC13xx LPC13xx
+Libraries for NXP Semiconductors LPC13xx series.
+
+@version 1.0.0
+
+@date 14 September 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LPC13xx_defines LPC13xx Defines
+
+@brief Defined Constants and Types for the LPC13xx series
+
+@version 1.0.0
+
+@date 14 September 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/libopencm3/include/libopencm3/lpc13xx/gpio.h b/libopencm3/include/libopencm3/lpc13xx/gpio.h
new file mode 100644
index 0000000..907533a
--- /dev/null
+++ b/libopencm3/include/libopencm3/lpc13xx/gpio.h
@@ -0,0 +1,124 @@
+/** @defgroup gpio_defines GPIO Defines
+
+@brief <b>Defined Constants and Types for the LPC13xx General Purpose I/O</b>
+
+@ingroup LPC13xx_defines
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+
+@date 10 March 2013
+
+LGPL License Terms @ref lgpl_license
+ */
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/**@{*/
+
+#ifndef LPC13XX_GPIO_H
+#define LPC13XX_GPIO_H
+
+#include <libopencm3/cm3/common.h>
+#include <libopencm3/lpc13xx/memorymap.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+#define GPIO0				GPIO_PIO0_BASE
+#define GPIO1				GPIO_PIO1_BASE
+#define GPIO2				GPIO_PIO2_BASE
+#define GPIO3				GPIO_PIO3_BASE
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+/* GPIO data register (GPIOn_DATA) */
+#define GPIO_DATA(port)			MMIO32(port + 0x3ffc)
+#define GPIO0_DATA			GPIO_DATA(GPIO0)
+#define GPIO1_DATA			GPIO_DATA(GPIO1)
+#define GPIO2_DATA			GPIO_DATA(GPIO2)
+#define GPIO3_DATA			GPIO_DATA(GPIO3)
+
+/* GPIO data direction register (GPIOn_DIR) */
+#define GPIO_DIR(port)			MMIO32(port + 0x00)
+#define GPIO0_DIR			GPIO_DIR(GPIO0)
+#define GPIO1_DIR			GPIO_DIR(GPIO1)
+#define GPIO2_DIR			GPIO_DIR(GPIO2)
+#define GPIO3_DIR			GPIO_DIR(GPIO3)
+
+/* GPIO interrupt sense register (GPIOn_IS) */
+#define GPIO_IS(port)			MMIO32(port + 0x04)
+#define GPIO0_IS			GPIO_IS(GPIO0)
+#define GPIO1_IS			GPIO_IS(GPIO1)
+#define GPIO2_IS			GPIO_IS(GPIO2)
+#define GPIO3_IS			GPIO_IS(GPIO3)
+
+/* GPIO interrupt both edges sense register (GPIOn_IBE) */
+#define GPIO_IBE(port)			MMIO32(port + 0x08)
+#define GPIO0_IBE			GPIO_IBE(GPIO0)
+#define GPIO1_IBE			GPIO_IBE(GPIO1)
+#define GPIO2_IBE			GPIO_IBE(GPIO2)
+#define GPIO3_IBE			GPIO_IBE(GPIO3)
+
+/* GPIO interrupt event register (GPIOn_IEV) */
+#define GPIO_IEV(port)			MMIO32(port + 0x0c)
+#define GPIO0_IEV			GPIO_IEV(GPIO0)
+#define GPIO1_IEV			GPIO_IEV(GPIO1)
+#define GPIO2_IEV			GPIO_IEV(GPIO2)
+#define GPIO3_IEV			GPIO_IEV(GPIO3)
+
+/* GPIO interrupt mask register (GPIOn_IE) */
+#define GPIO_IE(port)			MMIO16(port + 0x10)
+#define GPIO0_IE			GPIO_IE(GPIO0)
+#define GPIO1_IE			GPIO_IE(GPIO1)
+#define GPIO2_IE			GPIO_IE(GPIO2)
+#define GPIO3_IE			GPIO_IE(GPIO3)
+
+/* FIXME: IRS or RIS? Datasheet is not consistent here. */
+/* GPIO raw interrupt status register (GPIOn_IRS) */
+#define GPIO_IRS(port)			MMIO16(port + 0x14)
+#define GPIO0_IRS			GPIO_IRS(GPIO0)
+#define GPIO1_IRS			GPIO_IRS(GPIO1)
+#define GPIO2_IRS			GPIO_IRS(GPIO2)
+#define GPIO3_IRS			GPIO_IRS(GPIO3)
+
+/* GPIO masked interrupt status register (GPIOn_MIS) */
+#define GPIO_MIS(port)			MMIO16(port + 0x18)
+#define GPIO0_MIS			GPIO_MIS(GPIO0)
+#define GPIO1_MIS			GPIO_MIS(GPIO1)
+#define GPIO2_MIS			GPIO_MIS(GPIO2)
+#define GPIO3_MIS			GPIO_MIS(GPIO3)
+
+/* GPIO interrupt clear register (GPIOn_IC) */
+#define GPIO_IC(port)			MMIO16(port + 0x1c)
+#define GPIO0_IC			GPIO_IC(GPIO0)
+#define GPIO1_IC			GPIO_IC(GPIO1)
+#define GPIO2_IC			GPIO_IC(GPIO2)
+#define GPIO3_IC			GPIO_IC(GPIO3)
+
+BEGIN_DECLS
+
+void gpio_set(uint32_t gpioport, uint16_t gpios);
+
+END_DECLS
+
+/**@}*/
+
+#endif
diff --git a/libopencm3/include/libopencm3/lpc13xx/irq.json b/libopencm3/include/libopencm3/lpc13xx/irq.json
new file mode 100644
index 0000000..d9ac31f
--- /dev/null
+++ b/libopencm3/include/libopencm3/lpc13xx/irq.json
@@ -0,0 +1,63 @@
+{
+    "irqs": {
+        "0": "pio0_0", 
+        "1": "pio0_1", 
+        "2": "pio0_2", 
+        "3": "pio0_3", 
+        "4": "pio0_4", 
+        "5": "pio0_5", 
+        "6": "pio0_6", 
+        "7": "pio0_7", 
+        "8": "pio0_8", 
+        "9": "pio0_9", 
+        "10": "pio0_10", 
+        "11": "pio0_11", 
+        "12": "pio1_0", 
+        "13": "pio1_1", 
+        "14": "pio1_2", 
+        "15": "pio1_3", 
+        "16": "pio1_4", 
+        "17": "pio1_5", 
+        "18": "pio1_6", 
+        "19": "pio1_7", 
+        "20": "pio1_8", 
+        "21": "pio1_9", 
+        "22": "pio1_10", 
+        "23": "pio1_11", 
+        "24": "pio2_0", 
+        "25": "pio2_1", 
+        "26": "pio2_2", 
+        "27": "pio2_3", 
+        "28": "pio2_4", 
+        "29": "pio2_5", 
+        "30": "pio2_6", 
+        "31": "pio2_7", 
+        "32": "pio2_8", 
+        "33": "pio2_9", 
+        "34": "pio2_10", 
+        "35": "pio2_11", 
+        "36": "pio3_0", 
+        "37": "pio3_1", 
+        "38": "pio3_2", 
+        "39": "pio3_3", 
+        "40": "i2c0", 
+        "41": "ct16b0", 
+        "42": "ct16b1", 
+        "43": "ct32b0", 
+        "44": "ct32b1", 
+        "45": "ssp0", 
+        "46": "uart", 
+        "47": "usb", 
+        "48": "usb_fiq", 
+        "49": "adc", 
+        "50": "wdt", 
+        "51": "bod", 
+        "53": "pio3", 
+        "54": "pio2", 
+        "55": "pio1", 
+        "56": "ssp1"
+    }, 
+    "partname_humanreadable": "LPC 13xx series", 
+    "partname_doxygen": "LPC13xx", 
+    "includeguard": "LIBOPENCM3_LPC13xx_NVIC_H"
+}
\ No newline at end of file
diff --git a/libopencm3/include/libopencm3/lpc13xx/memorymap.h b/libopencm3/include/libopencm3/lpc13xx/memorymap.h
new file mode 100644
index 0000000..01b94b2
--- /dev/null
+++ b/libopencm3/include/libopencm3/lpc13xx/memorymap.h
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LPC13XX_MEMORYMAP_H
+#define LPC13XX_MEMORYMAP_H
+
+#include <libopencm3/cm3/common.h>
+
+/* --- LPC13XX specific peripheral definitions ----------------------------- */
+
+/* Memory map for all busses */
+#define PERIPH_BASE_APB			(0x40000000U)
+#define PERIPH_BASE_AHB			(0x50000000U)
+
+/* Register boundary addresses */
+
+/* APB */
+#define I2C_BASE			(PERIPH_BASE_APB + 0x00000)
+#define WDT_BASE			(PERIPH_BASE_APB + 0x04000)
+#define UART_BASE			(PERIPH_BASE_APB + 0x08000)
+#define TIMER0_16BIT_BASE		(PERIPH_BASE_APB + 0x0c000)
+#define TIMER1_16BIT_BASE		(PERIPH_BASE_APB + 0x10000)
+#define TIMER0_32BIT_BASE		(PERIPH_BASE_APB + 0x14000)
+#define TIMER1_32BIT_BASE		(PERIPH_BASE_APB + 0x18000)
+#define ADC_BASE			(PERIPH_BASE_APB + 0x1c000)
+#define USB_BASE			(PERIPH_BASE_APB + 0x20000)
+/* PERIPH_BASE_APB + 0x28000 (0x4002 8000 - 0x4003 7FFF): Reserved */
+#define PMU_BASE			(PERIPH_BASE_APB + 0x38000)
+#define FLASH_BASE			(PERIPH_BASE_APB + 0x3c000)
+#define SSP_BASE			(PERIPH_BASE_APB + 0x40000)
+#define IOCONFIG_BASE			(PERIPH_BASE_APB + 0x44000)
+#define SYSCTRL_BASE			(PERIPH_BASE_APB + 0x48000)
+/* PERIPH_BASE_APB + 0x4c000 (0x4004 c000 - 0x4007 FFFF): Reserved */
+
+/* AHB */
+#define GPIO_PIO0_BASE			(PERIPH_BASE_AHB + 0x00000)
+#define GPIO_PIO1_BASE			(PERIPH_BASE_AHB + 0x10000)
+#define GPIO_PIO2_BASE			(PERIPH_BASE_AHB + 0x20000)
+#define GPIO_PIO3_BASE			(PERIPH_BASE_AHB + 0x30000)
+/* PERIPH_BASE_AHB + 0x40000 (0x5004 0000 - 0x501F FFFF): Reserved */
+
+#endif