1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
|
/*
* Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/iram_alloc.h>
#include <linux/delay.h>
#include <linux/amba/bus.h>
#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/mach/map.h>
#include <asm/hardware/coresight.h>
static struct __init amba_device mx6_etb_device = {
.dev = {
.init_name = "etb",
},
.res = {
.start = MX6Q_ETB_BASE_ADDR,
.end = MX6Q_ETB_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.periphid = 0x3bb907,
};
static struct __init amba_device mx6_etm_device[] = {
{
.dev = {
.init_name = "etm.0",
},
.res = {
.start = MX6Q_PTM0_BASE_ADDR,
.end = MX6Q_PTM0_BASE_ADDR + SZ_4K - 1,
},
.periphid = 0x1bb950,
},
{
.dev = {
.init_name = "etm.1",
},
.res = {
.start = MX6Q_PTM1_BASE_ADDR,
.end = MX6Q_PTM1_BASE_ADDR + SZ_4K - 1,
},
.periphid = 0x1bb950,
},
{
.dev = {
.init_name = "etm.2",
},
.res = {
.start = MX6Q_PTM2_BASE_ADDR,
.end = MX6Q_PTM2_BASE_ADDR + SZ_4K - 1,
},
.periphid = 0x1bb950,
},
{
.dev = {
.init_name = "etm.3",
},
.res = {
.start = MX6Q_PTM3_BASE_ADDR,
.end = MX6Q_PTM3_BASE_ADDR + SZ_4K - 1,
},
.periphid = 0x1bb950,
},
};
#define FUNNEL_CTL 0
static int __init etm_init(void)
{
int i;
__iomem void *base;
base = ioremap(0x02144000, SZ_4K);
/*Unlock Funnel*/
__raw_writel(UNLOCK_MAGIC, base + CSMR_LOCKACCESS);
/*Enable all funnel port*/
__raw_writel(__raw_readl(base + FUNNEL_CTL) | 0xFF,
base + FUNNEL_CTL);
/*Lock Funnel*/
__raw_writel(0, base + CSMR_LOCKACCESS);
iounmap(base);
amba_device_register(&mx6_etb_device, &iomem_resource);
for (i = 0; i < num_possible_cpus(); i++)
amba_device_register(mx6_etm_device + i, &iomem_resource);
return 0;
}
subsys_initcall(etm_init);
|
