diff options
Diffstat (limited to 'arch/arm/plat-mxc/devices')
72 files changed, 6163 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig new file mode 100755 index 00000000..2e666bac --- /dev/null +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -0,0 +1,190 @@ +config IMX_HAVE_PLATFORM_DMA + bool + +config IMX_HAVE_PLATFORM_MXC_MLB + bool + +config IMX_HAVE_PLATFORM_FEC + bool + default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53 + +config IMX_HAVE_PLATFORM_FLEXCAN + select HAVE_CAN_FLEXCAN if CAN + bool + +config IMX_HAVE_PLATFORM_FSL_USB2_UDC + bool + +config IMX_HAVE_PLATFORM_GPIO_KEYS + bool + default y if SOC_IMX51 + +config IMX_HAVE_PLATFORM_GPMI_NFC + bool + +config IMX_HAVE_PLATFORM_IMX21_HCD + bool + +config IMX_HAVE_PLATFORM_IMX2_WDT + bool + +config IMX_HAVE_PLATFORM_IMXDI_RTC + bool + +config IMX_HAVE_PLATFORM_IMX_SRTC + bool + +config IMX_HAVE_PLATFORM_IMX_SNVS_RTC + bool + +config IMX_HAVE_PLATFORM_IMX_CAAM + bool + default y if SOC_IMX6Q + +config IMX_HAVE_PLATFORM_IMX_FB + bool + select HAVE_FB_IMX + +config IMX_HAVE_PLATFORM_IMX_I2C + bool + +config IMX_HAVE_PLATFORM_IMX_KEYPAD + bool + +config IMX_HAVE_PLATFORM_IMX_SSI + bool + +config IMX_HAVE_PLATFORM_IMX_ESAI + bool + +config IMX_HAVE_PLATFORM_IMX_UART + bool + +config IMX_HAVE_PLATFORM_IMX_UDC + bool + +config IMX_HAVE_PLATFORM_IPU_CORE + bool + +config IMX_HAVE_PLATFORM_MX1_CAMERA + bool + +config IMX_HAVE_PLATFORM_MX2_CAMERA + bool + +config IMX_HAVE_PLATFORM_MXC_EHCI + bool + +config IMX_HAVE_PLATFORM_MXC_MMC + bool + +config IMX_HAVE_PLATFORM_MXC_NAND + bool + +config IMX_HAVE_PLATFORM_MXC_PWM + bool + +config IMX_HAVE_PLATFORM_MXC_RNGA + bool + select ARCH_HAS_RNGA + +config IMX_HAVE_PLATFORM_MXC_RTC + bool + +config IMX_HAVE_PLATFORM_MXC_W1 + bool + +config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + bool + +config IMX_HAVE_PLATFORM_SPI_IMX + bool + +config IMX_HAVE_PLATFORM_IMX_IPUV3 + bool + +config IMX_HAVE_PLATFORM_IMX_TVE + bool + +config IMX_HAVE_PLATFORM_IMX_VPU + bool + +config IMX_HAVE_PLATFORM_IMX_DVFS + bool + +config IMX_HAVE_PLATFORM_AHCI + bool + +config IMX_HAVE_PLATFORM_IMX_IIM + bool + +config IMX_HAVE_PLATFORM_MXC_GPU + bool +config IMX_HAVE_PLATFORM_IMX_OCOTP + bool + +config IMX_HAVE_PLATFORM_IMX_VIIM + bool + +config IMX_HAVE_PLATFORM_IMX_DCP + bool + +config IMX_HAVE_PLATFORM_RANDOM_RNGC + bool + +config IMX_HAVE_PLATFORM_PERFMON + bool + +config IMX_HAVE_PLATFORM_LDB + bool + +config IMX_HAVE_PLATFORM_IMX_PXP + bool + +config IMX_HAVE_PLATFORM_IMX_ELCDIF + bool + +config IMX_HAVE_PLATFORM_IMX_EPDC + bool + +config IMX_HAVE_PLATFORM_IMX_SPDC + bool + +config IMX_HAVE_PLATFORM_IMX_SPDIF + bool + +config IMX_HAVE_PLATFORM_VIV_GPU + bool + +config IMX_HAVE_PLATFORM_MXC_HDMI + bool + +config IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL + bool + +config IMX_HAVE_PLATFORM_FSL_OTG + bool + +config IMX_HAVE_PLATFORM_FSL_USB_WAKEUP + bool + +config IMX_HAVE_PLATFORM_IMX_PM + bool + +config IMX_HAVE_PLATFORM_IMX_ASRC + bool + +config IMX_HAVE_PLATFORM_IMX_MIPI_DSI + bool + +config IMX_HAVE_PLATFORM_IMX_MIPI_CSI2 + bool + +config IMX_HAVE_PLATFORM_IMX_VDOA + bool + +config IMX_HAVE_PLATFORM_IMX_PCIE + bool + +config IMX_HAVE_PLATFORM_IMX_FSL_CSI + bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile new file mode 100755 index 00000000..102eeaaf --- /dev/null +++ b/arch/arm/plat-mxc/devices/Makefile @@ -0,0 +1,70 @@ +obj-$(CONFIG_IMX_HAVE_PLATFORM_DMA) += platform-dma.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MLB) += platform-mxc_mlb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC) += platform-imx-gpmi-nfc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SRTC) += platform-imx_srtc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC) += platform-imx_snvs_rtc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_CAAM) += platform-imx-caam.o +obj-y += platform-imx-dma.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_KEYPAD) += platform-imx-keypad.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ESAI) += platform-imx-esai.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IPU_CORE) += platform-ipu-core.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI) += platform-mxc-ehci.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_PWM) += platform-mxc_pwm.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RNGA) += platform-mxc_rnga.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3) += platform-imx_ipuv3.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_TVE) += platform-imx_tve.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_VPU) += platform-imx_vpu.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS) += platform-imx_dvfs.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_IIM) += platform-imx-iim.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_GPU) += platform-mxc_gpu.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP) += platform-imx-ocotp.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM) += platform-imx-viim.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_DCP) += platform-imx-dcp.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_RANDOM_RNGC) += platform-imx-rngb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_PERFMON) += platform-imx-perfmon.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_LDB) += platform-imx_ldb.o +obj-y += platform-imx-scc2.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_PXP) += platform-imx-pxp.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_EPDC) += platform-imx-epdc-fb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SPDC) += platform-imx-spdc-fb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ELCDIF) += platform-imx-elcdif-fb.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF) += platform-imx-spdif.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF) += platform-imx-spdif-dai.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF) += platform-imx-spdif-audio.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_VIV_GPU) += platform-viv_gpu.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL) += platform-imx-anatop-thermal.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_OTG) += platform-fsl-usb2-otg.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP) += platform-fsl-usb2-wakeup.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_PM) += platform-imx-pm.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI) += platform-mxc_hdmi.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI) += platform-mxc-hdmi-core.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI) += platform-imx-hdmi-soc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI) += platform-imx-hdmi-soc-dai.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC) += platform-imx-asrc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI) += platform-imx-mipi_dsi.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2) += platform-imx-mipi_csi2.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA) += platform-imx-vdoa.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE) += platform-imx-pcie.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FSL_CSI) += platform-imx-fsl-csi.o +obj-y += platform-imx-pmu.o diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c new file mode 100755 index 00000000..90d994c2 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-ahci-imx.c @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_ahci_data_entry_single(soc) \ + { \ + .iobase = soc ## _SATA_BASE_ADDR, \ + .irq = soc ## _INT_SATA, \ + } + +#ifdef CONFIG_SOC_IMX53 +const struct imx_ahci_data imx53_ahci_data __initconst = + imx_ahci_data_entry_single(MX53); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_ahci_data imx6q_ahci_data __initconst = + imx_ahci_data_entry_single(MX6Q); +#endif + +struct platform_device *__init imx_add_ahci( + const struct imx_ahci_data *data, + const struct ahci_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_SATA)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("ahci", 0 /* -1? */, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-dma.c b/arch/arm/plat-mxc/devices/platform-dma.c new file mode 100644 index 00000000..7f731954 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-dma.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/compiler.h> +#include <linux/err.h> +#include <linux/init.h> + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#ifdef CONFIG_SOC_IMX50 +const struct imx_dma_res_data imx50_dma_res_data __initconst = { + .iobase = MX50_APBHDMA_BASE_ADDR, +}; +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_dma_res_data imx6q_dma_res_data __initconst = { + .iobase = APBH_DMA_ARB_BASE_ADDR, +}; +#endif + +struct platform_device *__init imx_add_dma( + const struct imx_dma_res_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device_dmamask("mxs-dma-apbh", -1, + res, ARRAY_SIZE(res), NULL, 0, + DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c new file mode 100644 index 00000000..0a03ea9b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fec.c @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + * + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. + */ +#include <linux/dma-mapping.h> +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_fec_data_entry_single(soc, _devid) \ + { \ + .iobase = soc ## _FEC_BASE_ADDR, \ + .irq = soc ## _INT_FEC, \ + .devid = _devid, \ + } + +#ifdef CONFIG_SOC_IMX25 +const struct imx_fec_data imx25_fec_data __initconst = + imx_fec_data_entry_single(MX25, "imx28-fec"); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_fec_data imx27_fec_data __initconst = + imx_fec_data_entry_single(MX27, "imx28-fec"); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_fec_data imx35_fec_data __initconst = + imx_fec_data_entry_single(MX35, "imx28-fec"); +#endif + +#ifdef CONFIG_SOC_IMX50 +const struct imx_fec_data imx50_fec_data __initconst = + imx_fec_data_entry_single(MX50, "fec"); +#endif + +#ifdef CONFIG_SOC_IMX51 +const struct imx_fec_data imx51_fec_data __initconst = + imx_fec_data_entry_single(MX51, "fec"); +#endif + +#ifdef CONFIG_SOC_IMX53 +const struct imx_fec_data imx53_fec_data __initconst = + imx_fec_data_entry_single(MX53, "fec"); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_fec_data imx6q_fec_data __initconst = + imx_fec_data_entry_single(MX6Q, "enet"); + +const struct imx_fec_data imx6sl_fec_data __initconst = + imx_fec_data_entry_single(MX6DL, "fec"); +#endif + +struct platform_device *__init imx_add_fec( + const struct imx_fec_data *data, + const struct fec_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_ENET)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask(data->devid, 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/plat-mxc/devices/platform-flexcan.c new file mode 100644 index 00000000..d660237b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-flexcan.c @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2010 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_flexcan_data_entry_single(soc, _devid, _id, _hwid, _size) \ + { \ + .devid = _devid, \ + .id = _id, \ + .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_CAN ## _hwid, \ + } + +#define imx_flexcan_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_flexcan_data_entry_single(soc, _devid, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX25 +const struct imx_flexcan_data imx25_flexcan_data[] __initconst = { +#define imx25_flexcan_data_entry(_id, _hwid) \ + imx_flexcan_data_entry(MX25, "imx25-flexcan", _id, _hwid, SZ_16K) + imx25_flexcan_data_entry(0, 1), + imx25_flexcan_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_flexcan_data imx35_flexcan_data[] __initconst = { +#define imx35_flexcan_data_entry(_id, _hwid) \ + imx_flexcan_data_entry(MX35, "imx35-flexcan", _id, _hwid, SZ_16K) + imx35_flexcan_data_entry(0, 1), + imx35_flexcan_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_flexcan_data imx6q_flexcan_data[] __initconst = { +#define imx6q_flexcan_data_entry(_id, _hwid) \ + imx_flexcan_data_entry(MX6Q, "imx6q-flexcan", _id, _hwid, SZ_16K) + imx6q_flexcan_data_entry(0, 1), + imx6q_flexcan_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q*/ + +struct platform_device *__init imx_add_flexcan( + const struct imx_flexcan_data *data, + const struct flexcan_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device(data->devid, data->id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-otg.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-otg.c new file mode 100644 index 00000000..cbb56ff0 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-otg.c @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Based on Uwe Kleine-Koenig's platform-fsl-usb2-udc.c + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_fsl_usb2_otg_data_entry_single(soc) \ + { \ + .iobase = soc ## _USB_OTG_BASE_ADDR, \ + .irq = soc ## _INT_USB_OTG, \ + } + + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_fsl_usb2_otg_data imx6q_fsl_usb2_otg_data __initconst = + imx_fsl_usb2_otg_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_fsl_usb2_otg( + const struct imx_fsl_usb2_otg_data *data, + const struct fsl_usb2_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + int ret = -ENOMEM; + const char *name = "fsl-usb2-otg"; + int id = -1; + unsigned int num_resources = ARRAY_SIZE(res); + size_t size_data = sizeof(*pdata); + u64 dmamask = DMA_BIT_MASK(32); + struct platform_device *pdev; + + pdev = platform_device_alloc(name, id); + if (!pdev) + goto err; + + if (dmamask) { + /* + * This memory isn't freed when the device is put, + * I don't have a nice idea for that though. Conceptually + * dma_mask in struct device should not be a pointer. + * See http://thread.gmane.org/gmane.linux.kernel.pci/9081 + */ + pdev->dev.dma_mask = + kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); + if (!pdev->dev.dma_mask) + /* ret is still -ENOMEM; */ + goto err; + + *pdev->dev.dma_mask = dmamask; + pdev->dev.coherent_dma_mask = dmamask; + } + + ret = platform_device_add_resources(pdev, res, num_resources); + if (ret) + goto err; + + if (data) { + ret = platform_device_add_data(pdev, pdata, size_data); + if (ret) + goto err; + } + + return pdev; +err: + if (dmamask) + kfree(pdev->dev.dma_mask); + platform_device_put(pdev); + return ERR_PTR(ret); +} +EXPORT_SYMBOL(imx_add_fsl_usb2_otg); + diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c new file mode 100644 index 00000000..6e65a91c --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c @@ -0,0 +1,110 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/dma-mapping.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_fsl_usb2_udc_data_entry_single(soc) \ + { \ + .iobase = soc ## _USB_OTG_BASE_ADDR, \ + .irq = soc ## _INT_USB_OTG, \ + } + +#ifdef CONFIG_SOC_IMX25 +const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX25); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX31); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX35); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_fsl_usb2_udc_data imx6q_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_fsl_usb2_udc( + const struct imx_fsl_usb2_udc_data *data, + const struct fsl_usb2_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + int ret = -ENOMEM; + const char *name = "fsl-usb2-udc"; + int id = -1; + unsigned int num_resources = ARRAY_SIZE(res); + size_t size_data = sizeof(*pdata); + u64 dmamask = DMA_BIT_MASK(32); + struct platform_device *pdev; + + pdev = platform_device_alloc(name, id); + if (!pdev) + goto err; + + if (dmamask) { + /* + * This memory isn't freed when the device is put, + * I don't have a nice idea for that though. Conceptually + * dma_mask in struct device should not be a pointer. + * See http://thread.gmane.org/gmane.linux.kernel.pci/9081 + */ + pdev->dev.dma_mask = + kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); + if (!pdev->dev.dma_mask) + /* ret is still -ENOMEM; */ + goto err; + + *pdev->dev.dma_mask = dmamask; + pdev->dev.coherent_dma_mask = dmamask; + } + + ret = platform_device_add_resources(pdev, res, num_resources); + if (ret) + goto err; + + if (data) { + ret = platform_device_add_data(pdev, pdata, size_data); + if (ret) + goto err; + } + + return pdev; + +err: + if (dmamask) + kfree(pdev->dev.dma_mask); + platform_device_put(pdev); + return ERR_PTR(ret); +} +EXPORT_SYMBOL(imx_add_fsl_usb2_udc); + diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c new file mode 100644 index 00000000..3dacd287 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> +#define imx_fsl_usb2_wakeup_data_entry_single(soc, _id, hs) \ + { \ + .id = _id, \ + .irq_phy = soc ## _INT_USB_PHY ## _id, \ + .irq_core = soc ## _INT_USB_ ## hs, \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_fsl_usb2_wakeup_data imx6q_fsl_otg_wakeup_data __initconst = + imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 0, OTG); +const struct imx_fsl_usb2_wakeup_data imx6q_fsl_hs_wakeup_data[] __initconst = { + imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 1, HS1), + imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 2, HS2), + imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 3, HS3), +}; + +const struct imx_fsl_usb2_wakeup_data imx6sl_fsl_hs_wakeup_data[] __initconst = { + imx_fsl_usb2_wakeup_data_entry_single(MX6SL, 1, HS1), + imx_fsl_usb2_wakeup_data_entry_single(MX6SL, 2, HS2), + imx_fsl_usb2_wakeup_data_entry_single(MX6SL, 3, HS3), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_fsl_usb2_wakeup( + const struct imx_fsl_usb2_wakeup_data *data, + const struct fsl_usb2_wakeup_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->irq_phy, + .end = data->irq_phy, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq_core, + .end = data->irq_core, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("usb-wakeup", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} +EXPORT_SYMBOL(imx_add_fsl_usb2_wakeup); diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/plat-mxc/devices/platform-gpio_keys.c new file mode 100644 index 00000000..1c53a532 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-gpio_keys.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +struct platform_device *__init imx_add_gpio_keys( + const struct gpio_keys_platform_data *pdata) +{ + return imx_add_platform_device("gpio-keys", -1, NULL, + 0, pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-anatop-thermal.c b/arch/arm/plat-mxc/devices/platform-imx-anatop-thermal.c new file mode 100644 index 00000000..352d0f0c --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-anatop-thermal.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_anatop_thermal_imx_data_entry_single(soc) \ + { \ + .iobase = ANATOP_BASE_ADDR, \ + .calibration_addr = OCOTP_BASE_ADDR + 0x4E0, \ + .irq = MXC_INT_ANATOP_TEMPSNSR \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_anatop_thermal_imx_data imx6q_anatop_thermal_imx_data __initconst = + imx_anatop_thermal_imx_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_anatop_thermal_imx( + const struct imx_anatop_thermal_imx_data *data, + const struct anatop_thermal_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = data->calibration_addr, + .end = data->calibration_addr + SZ_4 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("anatop_thermal", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-asrc.c b/arch/arm/plat-mxc/devices/platform-imx-asrc.c new file mode 100644 index 00000000..c112a9ba --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-asrc.c @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_asrc_data_entry(soc, _id, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _ASRC ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_ASRC, \ + .dmatx1 = soc ## _DMA_REQ_ASRC## _TX1, \ + .dmarx1 = soc ## _DMA_REQ_ASRC## _RX1, \ + .dmatx2 = soc ## _DMA_REQ_ASRC## _TX2, \ + .dmarx2 = soc ## _DMA_REQ_ASRC## _RX2, \ + .dmatx3 = soc ## _DMA_REQ_ASRC## _TX3, \ + .dmarx3 = soc ## _DMA_REQ_ASRC## _RX3, \ + } + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_asrc_data imx53_imx_asrc_data[] __initconst = { +#define imx53_imx_asrc_data_entry(_id) \ + imx_imx_asrc_data_entry(MX53, _id, SZ_4K) + imx53_imx_asrc_data_entry(0), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx_asrc_data imx6q_imx_asrc_data[] __initconst = { +#define imx6q_imx_asrc_data_entry(_id) \ + imx_imx_asrc_data_entry(MX6Q, _id, SZ_4K) + imx6q_imx_asrc_data_entry(0), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_imx_asrc( + const struct imx_imx_asrc_data *data, + const struct imx_asrc_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, +#define DMARES(_name) { \ + .name = #_name, \ + .start = data->dma ## _name, \ + .end = data->dma ## _name, \ + .flags = IORESOURCE_DMA, \ +} + DMARES(tx1), + DMARES(rx1), + DMARES(tx2), + DMARES(rx2), + DMARES(tx3), + DMARES(rx3), + }; + + return imx_add_platform_device("mxc_asrc", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-caam.c b/arch/arm/plat-mxc/devices/platform-imx-caam.c new file mode 100644 index 00000000..aaaf501f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-caam.c @@ -0,0 +1,107 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +/* + * security violation interrupt is used as CAAM base _INT_SNVS_SEC + * SNVS consolidated = _INT_SNVS + * JR0 = MXC_INT_CAAM_INT0_NUM + * JR1 = MXC_INT_CAAM_INT1_NUM + */ + +const struct imx_caam_data imx6q_imx_caam_data __initconst = { + .iobase_caam = MXC_CAAM_BASE_ADDR, + .iobase_caam_sm = CAAM_SECMEM_BASE_ADDR, + .iobase_snvs = MX6Q_SNVS_BASE_ADDR, + .irq_sec_vio = MXC_INT_SNVS_SEC, + .irq_snvs = MX6Q_INT_SNVS, + .jr[0].offset_jr = 0x1000, + .jr[0].irq_jr = MXC_INT_CAAM_INT0_NUM, + .jr[1].offset_jr = 0x2000, + .jr[1].irq_jr = MXC_INT_CAAM_INT1_NUM, +}; + +struct platform_device *__init imx_add_caam( + const struct imx_caam_data *data) +{ + u32 res_count = 0; + struct resource res[] = { + { + /* Define base range for entire CAAM register map */ + .name = "iobase_caam", + .start = data->iobase_caam, + .end = data->iobase_caam + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, { + /* Define range for secure memory */ + .name = "iobase_caam_sm", + .start = data->iobase_caam_sm, + .end = data->iobase_caam_sm + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + /* Define range for SNVS */ + .name = "iobase_snvs", + .start = data->iobase_snvs, + .end = data->iobase_snvs + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + /* Define interrupt for security violations */ + .name = "irq_sec_vio", + .start = data->irq_sec_vio, + .end = data->irq_sec_vio, + .flags = IORESOURCE_IRQ, + }, { + /* Define general SNVS interrupt */ + .name = "irq_snvs", + .start = data->irq_snvs, + .end = data->irq_snvs, + .flags = IORESOURCE_IRQ, + }, { + .name = "offset_jr0", + .start = data->jr[0].offset_jr, + .end = data->jr[0].offset_jr, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_jr0", + .start = data->jr[0].irq_jr, + .end = data->jr[0].irq_jr, + .flags = IORESOURCE_IRQ, + }, { + .name = "offset_jr1", + .start = data->jr[1].offset_jr, + .end = data->jr[1].offset_jr, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_jr1", + .start = data->jr[1].irq_jr, + .end = data->jr[1].irq_jr, + .flags = IORESOURCE_IRQ, + }, + }; + + res_count = ARRAY_SIZE(res); + BUG_ON(!res_count); + + return imx_add_platform_device("caam", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-dcp.c b/arch/arm/plat-mxc/devices/platform-imx-dcp.c new file mode 100755 index 00000000..a77840b9 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-dcp.c @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#ifdef CONFIG_SOC_IMX50 +#define imx_dcp_data_entry_single(soc) \ +{ \ + .iobase = soc ## _DCP_BASE_ADDR, \ + .irq1 = soc ## _INT_DCP_CHAN0, \ + .irq2 = soc ## _INT_DCP_CHAN1_3, \ +} + +const struct imx_dcp_data imx50_dcp_data __initconst = + imx_dcp_data_entry_single(MX50); +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX6SL +#define imx_dcp_data_entry_single(soc) \ +{ \ + .iobase = soc ## _DCP_BASE_ADDR, \ + .irq1 = soc ## _INT_DCP_CH0, \ + .irq2 = soc ## _INT_DCP_GEN, \ +} + +const struct imx_dcp_data imx6sl_dcp_data __initconst = + imx_dcp_data_entry_single(MX6SL); +#endif /* ifdef CONFIG_SOC_IMX6SL */ + +struct platform_device *__init imx_add_dcp( + const struct imx_dcp_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = data->irq1, + .end = data->irq1, + .flags = IORESOURCE_IRQ, + }, + { + .start = data->irq2, + .end = data->irq2, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device_dmamask("dcp", 0, + res, ARRAY_SIZE(res), NULL, 0, DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c new file mode 100755 index 00000000..e7caaf4c --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -0,0 +1,282 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/compiler.h> +#include <linux/err.h> +#include <linux/init.h> + +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <mach/sdma.h> + +struct imx_imx_sdma_data { + resource_size_t iobase; + resource_size_t irq; + struct sdma_platform_data pdata; +}; + +#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ + { \ + .iobase = soc ## _SDMA ## _BASE_ADDR, \ + .irq = soc ## _INT_SDMA, \ + .pdata = { \ + .sdma_version = _sdma_version, \ + .cpu_name = _cpu_name, \ + .to_version = _to_version, \ + }, \ + } + +#ifdef CONFIG_SOC_IMX25 +struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX31 +struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = + imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = + imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX51 +struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 1); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX6Q +struct imx_imx_sdma_data imx6q_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX6Q, 2, "imx6q", 1); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +static struct platform_device __init __maybe_unused *imx_add_imx_sdma( + const struct imx_imx_sdma_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-sdma", -1, + res, ARRAY_SIZE(res), + &data->pdata, sizeof(data->pdata)); +} + +static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +{ + return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); +} + +#ifdef CONFIG_SOC_IMX25 +static struct sdma_script_start_addrs addr_imx25_to1 = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1255, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1120, + .per_2_shp_addr = 1329, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1560, + .mcu_2_ata_addr = 1479, + .app_2_per_addr = 1189, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1407, + .shp_2_mcu_addr = 979, +}; +#endif + +#ifdef CONFIG_SOC_IMX31 +static struct sdma_script_start_addrs addr_imx31_to1 = { + .per_2_per_addr = 1677, +}; + +static struct sdma_script_start_addrs addr_imx31_to2 = { + .ap_2_ap_addr = 423, + .ap_2_bp_addr = 829, + .bp_2_ap_addr = 1029, +}; +#endif + +#ifdef CONFIG_SOC_IMX35 +static struct sdma_script_start_addrs addr_imx35_to1 = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .uartsh_2_mcu_addr = 1183, + .per_2_shp_addr = 1033, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1333, + .mcu_2_ata_addr = 1252, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1111, + .shp_2_mcu_addr = 892, +}; + +static struct sdma_script_start_addrs addr_imx35_to2 = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1597, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1270, + .per_2_shp_addr = 1120, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1429, + .mcu_2_ata_addr = 1339, + .app_2_per_addr = 1531, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1198, + .shp_2_mcu_addr = 979, +}; +#endif + +#ifdef CONFIG_SOC_IMX51 +static struct sdma_script_start_addrs addr_imx51_to3 = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1473, + .mcu_2_ata_addr = 1392, + .app_2_per_addr = 1033, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1251, + .shp_2_mcu_addr = 892, +}; +#endif + +#ifdef CONFIG_SOC_IMX53 +static struct sdma_script_start_addrs addr_imx53_to1 = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .per_2_per_addr = 6331, + .uartsh_2_mcu_addr = 1032, + .mcu_2_shp_addr = 960, + .app_2_mcu_addr = 683, + .shp_2_mcu_addr = 891, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, +}; +#endif + +#ifdef CONFIG_SOC_IMX6Q +static struct sdma_script_start_addrs addr_imx6q_to1 = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .per_2_per_addr = 6331, + .uartsh_2_mcu_addr = 1032, + .mcu_2_shp_addr = 960, + .app_2_mcu_addr = 683, + .shp_2_mcu_addr = 891, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, + .mcu_2_ssish_addr = 6242, + .ssish_2_mcu_addr = 6678, +}; +#endif + +static int __init imxXX_add_imx_dma(void) +{ + struct platform_device *ret; + +#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) + if (cpu_is_mx21() || cpu_is_mx27()) + ret = imx_add_imx_dma(); + else +#endif + +#if defined(CONFIG_SOC_IMX25) + if (cpu_is_mx25()) { + imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25_to1; + ret = imx_add_imx_sdma(&imx25_imx_sdma_data); + } else +#endif + +#if defined(CONFIG_SOC_IMX31) + if (cpu_is_mx31()) { + int to_version = mx31_revision() >> 4; + imx31_imx_sdma_data.pdata.to_version = to_version; + if (to_version == 1) + imx31_imx_sdma_data.pdata.script_addrs = + &addr_imx31_to1; + else + imx31_imx_sdma_data.pdata.script_addrs = + &addr_imx31_to2; + ret = imx_add_imx_sdma(&imx31_imx_sdma_data); + } else +#endif + +#if defined(CONFIG_SOC_IMX35) + if (cpu_is_mx35()) { + int to_version = mx35_revision() >> 4; + imx35_imx_sdma_data.pdata.to_version = to_version; + if (to_version == 1) + imx35_imx_sdma_data.pdata.script_addrs = + &addr_imx35_to1; + else + imx35_imx_sdma_data.pdata.script_addrs = + &addr_imx35_to2; + ret = imx_add_imx_sdma(&imx35_imx_sdma_data); + } else +#endif + +#if defined(CONFIG_SOC_IMX51) + if (cpu_is_mx51()) { + int to_version = mx51_revision() >> 4; + imx51_imx_sdma_data.pdata.to_version = to_version; + if (to_version == 3) + imx51_imx_sdma_data.pdata.script_addrs = + &addr_imx51_to3; + ret = imx_add_imx_sdma(&imx51_imx_sdma_data); + } else +#endif +#if defined(CONFIG_SOC_IMX53) + if (cpu_is_mx53()) { + int to_version = 1; + imx53_imx_sdma_data.pdata.to_version = to_version; + if (to_version == 1) + imx53_imx_sdma_data.pdata.script_addrs = + &addr_imx53_to1; + ret = imx_add_imx_sdma(&imx53_imx_sdma_data); + } else +#endif +#if defined(CONFIG_ARCH_MX6) + int to_version = 1; + imx6q_imx_sdma_data.pdata.to_version = to_version; + if (to_version == 1) + imx6q_imx_sdma_data.pdata.script_addrs = + &addr_imx6q_to1; + ret = imx_add_imx_sdma(&imx6q_imx_sdma_data); + if (IS_ERR(ret)) + return PTR_ERR(ret); + + return 0; +#endif + ret = ERR_PTR(-ENODEV); + + if (IS_ERR(ret)) + return PTR_ERR(ret); + + return 0; +} +arch_initcall(imxXX_add_imx_dma); diff --git a/arch/arm/plat-mxc/devices/platform-imx-elcdif-fb.c b/arch/arm/plat-mxc/devices/platform-imx-elcdif-fb.c new file mode 100644 index 00000000..62cf9c6d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-elcdif-fb.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_elcdif_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _ELCDIF_BASE_ADDR, \ + .irq = soc ## _INT_ELCDIF, \ + .iosize = size, \ + } + +#ifdef CONFIG_IMX_HAVE_PLATFORM_IMX_ELCDIF //[ +#ifdef CONFIG_SOC_IMX6SL +const struct imx_elcdif_data imx6dl_elcdif_data __initconst = + imx_elcdif_data_entry_single(MX6DL, SZ_16K); +#endif + +struct platform_device *__init imx_add_imx_elcdif( + const struct imx_elcdif_data *data, + const struct mxc_fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device_dmamask("mxc_elcdif_fb", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} +#endif //]CONFIG_IMX_HAVE_PLATFORM_IMX_ELCDIF + diff --git a/arch/arm/plat-mxc/devices/platform-imx-epdc-fb.c b/arch/arm/plat-mxc/devices/platform-imx-epdc-fb.c new file mode 100644 index 00000000..459e6cc3 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-epdc-fb.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_epdc_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _EPDC_BASE_ADDR, \ + .irq = soc ## _INT_EPDC, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX50 +const struct imx_epdc_data imx50_epdc_data __initconst = + imx_epdc_data_entry_single(MX50, SZ_4K); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_epdc_data imx6dl_epdc_data __initconst = + imx_epdc_data_entry_single(MX6DL, SZ_16K); +#endif + +struct platform_device *__init imx_add_imx_epdc( + const struct imx_epdc_data *data, + const struct imx_epdc_fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_EPDC)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("imx_epdc_fb", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-esai.c b/arch/arm/plat-mxc/devices/platform-imx-esai.c new file mode 100644 index 00000000..03bd53ba --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-esai.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx53_esai_data_entry(soc, _id, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = MX53_ESAI_BASE_ADDR, \ + .iosize = _size, \ + .irq = MX53_INT_ESAI, \ + .dmatx = soc ## _DMA_REQ_ESAI ## _TX, \ + .dmarx = soc ## _DMA_REQ_ESAI ## _RX, \ + } + +#define imx6q_esai_data_entry(soc, _id, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = ESAI1_BASE_ADDR, \ + .iosize = _size, \ + .irq = MXC_INT_ESAI, \ + .dmatx = soc ## _DMA_REQ_ESAI ## _TX, \ + .dmarx = soc ## _DMA_REQ_ESAI ## _RX, \ + } + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_esai_data imx53_imx_esai_data[] __initconst = { +#define imx53_imx_esai_data_entry(_id) \ + imx53_esai_data_entry(MX53, _id, SZ_4K) + imx53_imx_esai_data_entry(0), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx_esai_data imx6q_imx_esai_data[] __initconst = { +#define imx6q_imx_esai_data_entry(_id) \ + imx6q_esai_data_entry(MX6Q, _id, SZ_4K) + imx6q_imx_esai_data_entry(0), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_imx_esai( + const struct imx_imx_esai_data *data, + const struct imx_esai_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, +#define DMARES(_name) { \ + .name = #_name, \ + .start = data->dma ## _name, \ + .end = data->dma ## _name, \ + .flags = IORESOURCE_DMA, \ +} + DMARES(tx), + DMARES(rx), + }; + + return imx_add_platform_device("imx-esai", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/plat-mxc/devices/platform-imx-fb.c new file mode 100644 index 00000000..2b0b5e0a --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-fb.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/dma-mapping.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_fb_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _LCDC_BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_LCDC, \ + } + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_fb_data imx1_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX1, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_fb_data imx21_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX21, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_fb_data imx25_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX25, SZ_16K); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_fb_data imx27_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX27, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_imx_fb( + const struct imx_imx_fb_data *data, + const struct imx_fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("imx-fb", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-fsl-csi.c b/arch/arm/plat-mxc/devices/platform-imx-fsl-csi.c new file mode 100644 index 00000000..8b6601cc --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-fsl-csi.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_fsl_csi_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _CSI_BASE_ADDR, \ + .irq = soc ## _INT_CSI, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_fsl_csi_data imx6sl_csi_data __initconst = + imx_fsl_csi_data_entry_single(MX6SL, SZ_16K); +#endif + +struct platform_device *__init imx_add_fsl_csi( + const struct imx_fsl_csi_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("fsl_csi", -1, + res, ARRAY_SIZE(res), NULL, 0); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c b/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c new file mode 100644 index 00000000..a1e297d5 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include <linux/mtd/gpmi-nand.h> +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#ifdef CONFIG_SOC_IMX50 +struct platform_device *__init +imx_add_gpmi(const struct gpmi_nfc_platform_data *platform_data) +{ + struct resource res[] = { + { /* GPMI */ + .name = GPMI_NFC_GPMI_REGS_ADDR_RES_NAME, + .flags = IORESOURCE_MEM, + .start = MX50_GPMI_BASE_ADDR, + .end = MX50_GPMI_BASE_ADDR + SZ_8K - 1, + }, { + .name = GPMI_NFC_GPMI_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MX50_INT_RAWNAND_GPMI, + .end = MX50_INT_RAWNAND_GPMI, + }, { /* BCH */ + .name = GPMI_NFC_BCH_REGS_ADDR_RES_NAME, + .flags = IORESOURCE_MEM, + .start = MX50_BCH_BASE_ADDR, + .end = MX50_BCH_BASE_ADDR + SZ_8K - 1, + }, { + .name = GPMI_NFC_BCH_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MX50_INT_RAWNAND_BCH, + .end = MX50_INT_RAWNAND_BCH, + }, { /* DMA */ + .name = GPMI_NFC_DMA_CHANNELS_RES_NAME, + .flags = IORESOURCE_DMA, + .start = MX50_DMA_CHANNEL_AHB_APBH_GPMI0, + .end = MX50_DMA_CHANNEL_AHB_APBH_GPMI7, + }, { + .name = GPMI_NFC_DMA_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MX50_INT_APBHDMA_CHAN0, + .end = MX50_INT_APBHDMA_CHAN7, + }, }; + + return imx_add_platform_device_dmamask("imx50-gpmi-nfc", 0, + res, ARRAY_SIZE(res), platform_data, + sizeof(*platform_data), DMA_BIT_MASK(32)); +} +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX6Q +struct platform_device *__init +imx_add_gpmi(const struct gpmi_nand_platform_data *platform_data) +{ + struct resource res[] = { + { /* GPMI */ + .name = GPMI_NAND_GPMI_REGS_ADDR_RES_NAME, + .flags = IORESOURCE_MEM, + .start = MX6Q_GPMI_BASE_ADDR, + .end = MX6Q_GPMI_BASE_ADDR + SZ_8K - 1, + }, { + .name = GPMI_NAND_GPMI_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MXC_INT_RAWNAND_GPMI, + .end = MXC_INT_RAWNAND_GPMI, + }, { /* BCH */ + .name = GPMI_NAND_BCH_REGS_ADDR_RES_NAME, + .flags = IORESOURCE_MEM, + .start = MX6Q_BCH_BASE_ADDR, + .end = MX6Q_BCH_BASE_ADDR + SZ_8K - 1, + }, { + .name = GPMI_NAND_BCH_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MXC_INT_RAWNAND_BCH, + .end = MXC_INT_RAWNAND_BCH, + }, { /* DMA */ + .name = GPMI_NAND_DMA_CHANNELS_RES_NAME, + .flags = IORESOURCE_DMA, + .start = MX6Q_DMA_CHANNEL_AHB_APBH_GPMI0, + .end = MX6Q_DMA_CHANNEL_AHB_APBH_GPMI7, + }, { + .name = GPMI_NAND_DMA_INTERRUPT_RES_NAME, + .flags = IORESOURCE_IRQ, + .start = MXC_INT_APBHDMA_DMA, + .end = MXC_INT_APBHDMA_DMA, + }, }; + + return imx_add_platform_device_dmamask("imx6q-gpmi-nand", 0, + res, ARRAY_SIZE(res), platform_data, + sizeof(*platform_data), DMA_BIT_MASK(32)); +} +#endif diff --git a/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc-dai.c b/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc-dai.c new file mode 100644 index 00000000..26f4ae71 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc-dai.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_hdmi_soc_data_entry_single(soc) \ + { \ + .irq = soc ## _INT_HDMI_TX, \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_hdmi_soc_data imx6q_imx_hdmi_soc_dai_data __initconst = + imx_hdmi_soc_data_entry_single(MX6Q); +#endif + +struct platform_device *__init imx_add_hdmi_soc_dai( + const struct imx_hdmi_soc_data *data) +{ + struct resource res[] = { + { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_HDMI)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device("imx-hdmi-soc-dai", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc.c b/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc.c new file mode 100644 index 00000000..7be6756c --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-hdmi-soc.c @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +struct platform_device *__init imx_add_hdmi_soc(void) +{ + + if (!fuse_dev_is_available(MXC_DEV_HDMI)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device("mxc_hdmi_soc", 0, + NULL, 0, NULL, 0); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c new file mode 100755 index 00000000..d11f52da --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_I2C ## _hwid, \ + } + +#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { +#define imx25_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_imx_i2c_data_entry(0, 1), + imx25_imx_i2c_data_entry(1, 2), + imx25_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { +#define imx27_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_i2c_data_entry(0, 1), + imx27_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { +#define imx31_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_i2c_data_entry(0, 1), + imx31_imx_i2c_data_entry(1, 2), + imx31_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { +#define imx35_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) + imx35_imx_i2c_data_entry(0, 1), + imx35_imx_i2c_data_entry(1, 2), + imx35_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX50 +const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { +#define imx50_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K) + imx50_imx_i2c_data_entry(0, 1), + imx50_imx_i2c_data_entry(1, 2), + imx50_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { +#define imx51_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_i2c_data_entry(0, 1), + imx51_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { +#define imx53_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) + imx53_imx_i2c_data_entry(0, 1), + imx53_imx_i2c_data_entry(1, 2), + imx53_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx_i2c_data imx6q_imx_i2c_data[] __initconst = { +#define imx6q_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX6Q, _id, _hwid, SZ_4K) + imx6q_imx_i2c_data_entry(0, 1), + imx6q_imx_i2c_data_entry(1, 2), + imx6q_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_imx_i2c( + const struct imx_imx_i2c_data *data, + const struct imxi2c_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-i2c", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-iim.c b/arch/arm/plat-mxc/devices/platform-imx-iim.c new file mode 100755 index 00000000..74043ded --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-iim.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx5_iim_data_entry_single(soc) \ + { \ + .iobase = soc ## _IIM_BASE_ADDR, \ + .irq = soc ## _INT_IIM, \ + } + +#ifdef CONFIG_SOC_IMX51 +const struct imx_iim_data imx51_imx_iim_data __initconst = + imx5_iim_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_iim_data imx53_imx_iim_data __initconst = + imx5_iim_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +struct platform_device *__init imx_add_iim( + const struct imx_iim_data *data, + const struct mxc_iim_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_iim", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c new file mode 100644 index 00000000..1a120218 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_keypad_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _KPP_BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_KPP, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX21, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_keypad_data imx25_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX25, SZ_16K); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX27, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx_keypad_data imx31_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX31, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX35, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX51, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_imx_keypad_data imx6sl_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX6SL, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX6SL */ + +struct platform_device *__init imx_add_imx_keypad( + const struct imx_imx_keypad_data *data, + const struct matrix_keymap_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-keypad", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-mipi_csi2.c b/arch/arm/plat-mxc/devices/platform-imx-mipi_csi2.c new file mode 100644 index 00000000..ed8a2fbd --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-mipi_csi2.c @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mipi_csi2_data_entry_single(soc, _id, size) \ +{ \ + .id = _id, \ + .iobase = soc ## _MIPI_CSI2_BASE_ADDR, \ + .iosize = size, \ +} + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_mipi_csi2_data imx6q_mipi_csi2_data __initconst = + imx_mipi_csi2_data_entry_single(MX6Q, 0, SZ_4K); +#endif + +struct platform_device *__init imx_add_mipi_csi2( + const struct imx_mipi_csi2_data *data, + const struct mipi_csi2_platform_data *pdata) { + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("mxc_mipi_csi2", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-mipi_dsi.c b/arch/arm/plat-mxc/devices/platform-imx-mipi_dsi.c new file mode 100644 index 00000000..136a8fcc --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-mipi_dsi.c @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mipi_dsi_data_entry_single(soc, _id, _hwid, size) \ + { \ + .id = _id, \ + .iobase = soc ## _MIPI_DSI ## _hwid ## _BASE_ADDR, \ + .iosize = size, \ + .irq = soc ## _INT_DSI ## _hwid, \ + } + +#define imx_mipi_dsi_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_mipi_dsi_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX6Q +#define SOC_IOMUXC_BASE_ADDR MX6Q_IOMUXC_BASE_ADDR +const struct imx_mipi_dsi_data imx6q_mipi_dsi_data __initconst = + imx_mipi_dsi_data_entry_single(MX6Q, 0, , SZ_4K); +#endif + +struct platform_device *__init imx_add_mipi_dsi( + const struct imx_mipi_dsi_data *data, + const struct mipi_dsi_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = SOC_IOMUXC_BASE_ADDR, + .end = SOC_IOMUXC_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_mipi_dsi", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c new file mode 100755 index 00000000..055fe337 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/fsl_devices.h> + +#ifdef CONFIG_SOC_IMX50 +#define BANK(a, b, c, d, e, f, g, h) \ + {\ + ("HW_OCOTP_"#a), ("HW_OCOTP_"#b), ("HW_OCOTP_"#c), ("HW_OCOTP_"#d), \ + ("HW_OCOTP_"#e), ("HW_OCOTP_"#f), ("HW_OCOTP_"#g), ("HW_OCOTP_"#h) \ + } + +#define BANKS (5) +#define BANK_ITEMS (8) +static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { + BANK(LOCK, CFG0, CFG1, CFG2, CFG3, CFG4, CFG5, CFG6), + BANK(MEM0, MEM1, MEM2, MEM3, MEM4, MEM5, GP0, GP1), + BANK(SCC0, SCC1, SCC2, SCC3, SCC4, SCC5, SCC6, SCC7), + BANK(SRK0, SRK1, SRK2, SRK3, SRK4, SRK5, SRK6, SRK7), + BANK(SJC0, SJC1, MAC0, MAC1, HWCAP0, HWCAP1, HWCAP2, SWCAP), +}; + +static const struct mxc_otp_platform_data imx50_otp_platform_data = { + .fuse_name = (char **)bank_reg_desc, + .clock_name = "ocotp_ctrl_ahb_clk", + .fuse_num = BANKS * BANK_ITEMS, +}; + +const struct imx_otp_data imx50_otp_data = { + .iobase = MX50_OCOTP_CTRL_BASE_ADDR, + .pdata = &imx50_otp_platform_data, +}; +#undef BANK +#undef BANKS +#undef BANK_ITEMS +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX6Q +#define BANK(a, b, c, d, e, f, g, h) \ + {\ + ("HW_OCOTP_"#a), ("HW_OCOTP_"#b), ("HW_OCOTP_"#c), ("HW_OCOTP_"#d), \ + ("HW_OCOTP_"#e), ("HW_OCOTP_"#f), ("HW_OCOTP_"#g), ("HW_OCOTP_"#h) \ + } + +#define BANKS (16) +#define BANK_ITEMS (8) +static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { + BANK(LOCK, CFG0, CFG1, CFG2, CFG3, CFG4, CFG5, CFG6), + BANK(MEM0, MEM1, MEM2, MEM3, MEM4, ANA0, ANA1, ANA2), + BANK(OTPMK0, OTPMK1, OTPMK2, OTPMK3, OTPMK4, OTPMK5, OTPMK6, OTPMK7), + BANK(SRK0, SRK1, SRK2, SRK3, SRK4, SRK5, SRK6, SRK7), + BANK(RESP0, HSJC_RESP1, MAC0, MAC1, HDCP_KSV0, HDCP_KSV1, GP1, GP2), + BANK(DTCP_KEY0, DTCP_KEY1, DTCP_KEY2, DTCP_KEY3, DTCP_KEY4, MISC_CONF, FIELD_RETURN, SRK_REVOKE), + BANK(HDCP_KEY0, HDCP_KEY1, HDCP_KEY2, HDCP_KEY3, HDCP_KEY4, HDCP_KEY5, HDCP_KEY6, HDCP_KEY7), + BANK(HDCP_KEY8, HDCP_KEY9, HDCP_KEY10, HDCP_KEY11, HDCP_KEY12, HDCP_KEY13, HDCP_KEY14, HDCP_KEY15), + BANK(HDCP_KEY16, HDCP_KEY17, HDCP_KEY18, HDCP_KEY19, HDCP_KEY20, HDCP_KEY21, HDCP_KEY22, HDCP_KEY23), + BANK(HDCP_KEY24, HDCP_KEY25, HDCP_KEY26, HDCP_KEY27, HDCP_KEY28, HDCP_KEY29, HDCP_KEY30, HDCP_KEY31), + BANK(HDCP_KEY32, HDCP_KEY33, HDCP_KEY34, HDCP_KEY35, HDCP_KEY36, HDCP_KEY37, HDCP_KEY38, HDCP_KEY39), + BANK(HDCP_KEY40, HDCP_KEY41, HDCP_KEY42, HDCP_KEY43, HDCP_KEY44, HDCP_KEY45, HDCP_KEY46, HDCP_KEY47), + BANK(HDCP_KEY48, HDCP_KEY49, HDCP_KEY50, HDCP_KEY51, HDCP_KEY52, HDCP_KEY53, HDCP_KEY54, HDCP_KEY55), + BANK(HDCP_KEY56, HDCP_KEY57, HDCP_KEY58, HDCP_KEY59, HDCP_KEY60, HDCP_KEY61, HDCP_KEY62, HDCP_KEY63), + BANK(HDCP_KEY64, HDCP_KEY65, HDCP_KEY66, HDCP_KEY67, HDCP_KEY68, HDCP_KEY69, HDCP_KEY70, HDCP_KEY71), + BANK(CRC0, CRC1, CRC2, CRC3, CRC4, CRC5, CRC6, CRC7), +}; + +static const struct mxc_otp_platform_data imx6q_otp_platform_data = { + .fuse_name = (char **)bank_reg_desc, + .clock_name = "iim_clk", + .fuse_num = BANKS * BANK_ITEMS, +}; + +const struct imx_otp_data imx6q_otp_data = { + .iobase = OCOTP_BASE_ADDR, + .pdata = (struct mxc_otp_platform_data *)&imx6q_otp_platform_data, +}; +#undef BANK +#undef BANKS +#undef BANK_ITEMS +#endif /* ifdef CONFIG_SOC_IMX6Q */ + + +struct platform_device *__init imx_add_otp( + const struct imx_otp_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } + }; + + return imx_add_platform_device("imx-ocotp", 0, + res, ARRAY_SIZE(res), data->pdata, + sizeof(struct mxc_otp_platform_data)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-pcie.c b/arch/arm/plat-mxc/devices/platform-imx-pcie.c new file mode 100644 index 00000000..7e0d630f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-pcie.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_pcie_data_entry_single(soc, _id, _hwid, size) \ + { \ + .id = _id, \ + .iobase = soc ## _PCIE ## _hwid ## _BASE_ADDR, \ + .iosize = size, \ + .irq = soc ## _INT_PCIE ## _hwid, \ + } + +#define imx_pcie_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_pcie_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX6Q +#define MX6Q_PCIE_BASE_ADDR (PCIE_ARB_END_ADDR - SZ_16K + 1) +#define MX6Q_INT_PCIE MXC_INT_PCIE_3 +const struct imx_pcie_data imx6q_pcie_data __initconst = + imx_pcie_data_entry_single(MX6Q, 0, , SZ_16K); +#endif + +struct platform_device *__init imx_add_pcie( + const struct imx_pcie_data *data, + const struct imx_pcie_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_PCIE)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device("imx-pcie", -1, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-perfmon.c b/arch/arm/plat-mxc/devices/platform-imx-perfmon.c new file mode 100644 index 00000000..56e262b3 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-perfmon.c @@ -0,0 +1,158 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/fsl_devices.h> +#include <mach/iomux-v3.h> + +#ifdef CONFIG_SOC_IMX50 +static struct mxs_perfmon_bit_config +mx50_perfmon_bit_config[] = { + {.field = (1 << 0), .name = "MID0-CORE" }, + {.field = (1 << 1), .name = "MID1-DCP" }, + {.field = (1 << 2), .name = "MID2-PXP" }, + {.field = (1 << 3), .name = "MID3-USB" }, + {.field = (1 << 4), .name = "MID4-GPU2D" }, + {.field = (1 << 5), .name = "MID5-BCH" }, + {.field = (1 << 6), .name = "MID6-AHB" }, + {.field = (1 << 7), .name = "MID7-EPDC" }, + {.field = (1 << 8), .name = "MID8-LCDIF" }, + {.field = (1 << 9), .name = "MID9-SDMA" }, + {.field = (1 << 10), .name = "MID10-FEC" }, + {.field = (1 << 11), .name = "MID11-MSHC" } +}; + +struct mxs_platform_perfmon_data mxc_perfmon_data = { + .bit_config_tab = mx50_perfmon_bit_config, + .bit_config_cnt = ARRAY_SIZE(mx50_perfmon_bit_config), +}; + + +const struct imx_perfmon_data imx50_perfmon_data = { + .iobase = MX50_PERFMON_BASE_ADDR, + .pdata = &mxc_perfmon_data, +}; +#endif + +#ifdef CONFIG_SOC_IMX6Q +static struct mxs_perfmon_bit_config +mx6q_perfmon1_bit_config[] = { + {.field = (1 << 0), .name = "MID0-GPU_3D" }, + {.field = (1 << 1), .name = "MID1-GPU_2D" }, + {.field = (1 << 2), .name = "MID2-VDOA" }, + {.field = (1 << 3), .name = "MID3-Unused" }, + {.field = (1 << 4), .name = "MID4-OPENVG" } +}; + +static struct mxs_perfmon_bit_config +mx6q_perfmon2_bit_config[] = { + {.field = (1 << 0), .name = "MID0-IPU1.ld00" }, + {.field = (1 << 1), .name = "MID1-IPU1.ld01" }, + {.field = (1 << 2), .name = "MID2-IPU1.ld10" }, + {.field = (1 << 3), .name = "MID3-IPU1.ld11" } +}; + +static struct mxs_perfmon_bit_config +mx6q_perfmon3_bit_config[] = { + {.field = (1 << 0), .name = "MID0-CORES" }, + {.field = (1 << 1), .name = "MID1-L2-BUF" }, + {.field = (1 << 2), .name = "MID2-Unused" }, + {.field = (1 << 3), .name = "MID3-L2-EVIC" }, + {.field = (1 << 4), .name = "MID4-Unused" } +}; + +static int init; + +static void platform_perfmon_init(void) +{ + if (init) + return; + + if (mx6q_revision() == IMX_CHIP_REVISION_1_0 || cpu_is_mx6dl()) + /* GPR11 bit[16] must be set for TO1.0(6q & 6dl), it's a bug */ + mxc_iomux_set_gpr_register(11, 16, 1, 1); + + mxc_iomux_set_gpr_register(11, 0, 1, 1); + init = true; +} + +static void platform_perfmon_exit(void) +{ + if (!init) + return; + + mxc_iomux_set_gpr_register(11, 0, 1, 0); + init = false; +} + +struct mxs_platform_perfmon_data mxc_perfmon_data1 = { + .bit_config_tab = mx6q_perfmon1_bit_config, + .bit_config_cnt = ARRAY_SIZE(mx6q_perfmon1_bit_config), + .plt_init = platform_perfmon_init, + .plt_exit = platform_perfmon_exit, +}; + +struct mxs_platform_perfmon_data mxc_perfmon_data2 = { + .bit_config_tab = mx6q_perfmon2_bit_config, + .bit_config_cnt = ARRAY_SIZE(mx6q_perfmon2_bit_config), + .plt_init = platform_perfmon_init, +}; + +struct mxs_platform_perfmon_data mxc_perfmon_data3 = { + .bit_config_tab = mx6q_perfmon3_bit_config, + .bit_config_cnt = ARRAY_SIZE(mx6q_perfmon3_bit_config), + .plt_init = platform_perfmon_init, +}; + +const struct imx_perfmon_data imx6q_perfmon_data[3] = { + { + .iobase = IP2APB_PERFMON1_BASE_ADDR, + .pdata = &mxc_perfmon_data1, + }, + { + .iobase = IP2APB_PERFMON2_BASE_ADDR, + .pdata = &mxc_perfmon_data2, + }, + { + .iobase = IP2APB_PERFMON3_BASE_ADDR, + .pdata = &mxc_perfmon_data3, + } +}; +#endif + +struct platform_device *__init imx_add_perfmon( + const struct imx_perfmon_data *data) +{ + static int id; + + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + } + }; + + return imx_add_platform_device("mxs-perfmon", id++, + res, ARRAY_SIZE(res), data->pdata, + sizeof(struct mxs_platform_perfmon_data)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-pm.c b/arch/arm/plat-mxc/devices/platform-imx-pm.c new file mode 100644 index 00000000..5b865ad4 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-pm.c @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_pm_imx_data_entry_single(soc) \ + { \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_pm_imx_data imx6q_pm_imx_data[] __initconst = + imx_pm_imx_data_entry_single(MX6Q); +#endif + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_pm_imx_data imx6sl_pm_imx_data[] __initconst = + imx_pm_imx_data_entry_single(MX6SL); +#endif + +struct platform_device *__init imx_add_pm_imx( + const struct imx_pm_imx_data *data, + const struct pm_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("imx_pm", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-pmu.c b/arch/arm/plat-mxc/devices/platform-imx-pmu.c new file mode 100644 index 00000000..cf29415d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-pmu.c @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <asm/pmu.h> + +static struct resource mx6_pmu_resources[] = { + [0] = { + .start = MXC_INT_CHEETAH_PERFORM, + .end = MXC_INT_CHEETAH_PERFORM, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device mx6_pmu_device = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .num_resources = ARRAY_SIZE(mx6_pmu_resources), + .resource = mx6_pmu_resources, +}; + +void __init imx_add_imx_armpmu() +{ + platform_device_register(&mx6_pmu_device); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-pxp.c b/arch/arm/plat-mxc/devices/platform-imx-pxp.c new file mode 100644 index 00000000..fed58d09 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-pxp.c @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_pxp_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _EPXP_BASE_ADDR, \ + .irq = soc ## _INT_EPXP, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX50 +const struct imx_pxp_data imx50_pxp_data __initconst = + imx_pxp_data_entry_single(MX50, SZ_4K); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_pxp_data imx6dl_pxp_data __initconst = + imx_pxp_data_entry_single(MX6DL, SZ_16K); +#endif + +struct platform_device *__init imx_add_imx_pxp( + const struct imx_pxp_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_PXP)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("imx-pxp", -1, + res, ARRAY_SIZE(res), NULL, 0, DMA_BIT_MASK(32)); +} + +struct platform_device *__init imx_add_imx_pxp_client() +{ + if (!fuse_dev_is_available(MXC_DEV_PXP)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device("imx-pxp-client", -1, + NULL, 0, NULL, 0); +} + +struct platform_device *__init imx_add_imx_pxp_v4l2() +{ + if (!fuse_dev_is_available(MXC_DEV_PXP)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("pxp-v4l2", -1, + NULL, 0, NULL, 0, DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-rngb.c b/arch/arm/plat-mxc/devices/platform-imx-rngb.c new file mode 100755 index 00000000..9a0a652d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-rngb.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_rngb_data_entry_single(soc) \ +{ \ + .iobase = soc ## _RNGB_BASE_ADDR, \ + .irq = soc ## _INT_RNGB, \ +} + +#ifdef CONFIG_SOC_IMX50 +const struct imx_rngb_data imx50_rngb_data __initconst = + imx_rngb_data_entry_single(MX50); +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_rngb_data imx6sl_rngb_data __initconst = + imx_rngb_data_entry_single(MX6SL); +#endif /* ifdef CONFIG_SOC_IMX6SL */ + +struct platform_device *__init imx_add_rngb( + const struct imx_rngb_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("fsl_rngc", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-scc2.c b/arch/arm/plat-mxc/devices/platform-imx-scc2.c new file mode 100644 index 00000000..10e03b66 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-scc2.c @@ -0,0 +1,284 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/mxc_scc2_driver.h> +#include <linux/delay.h> + +#define imx_scc2_data_entry_single(soc) \ +{ \ + .iobase = soc ## _SCC_BASE_ADDR, \ + .ram_start = soc ## _SCC_RAM_BASE_ADDR, \ + .irq_smn = soc ## _INT_SCC_SMN, \ + .irq_scm = soc ## _INT_SCC_SCM, \ +} + +#ifdef CONFIG_SOC_IMX51 +const struct imx_mxc_scc2_data imx51_mxc_scc2_data __initconst = + imx_scc2_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_mxc_scc2_data imx53_mxc_scc2_data __initconst = + imx_scc2_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#define SCM_RD_DELAY 1000000 /* in nanoseconds */ +#define SEC_TO_NANOSEC 1000000000 /*Second to nanoseconds */ +static __init void mxc_init_scc_iram(struct resource res[]) +{ + uint32_t reg_value; + uint32_t reg_mask = 0; + uint8_t *UMID_base; + uint32_t *MAP_base; + uint8_t i; + uint32_t partition_no; + uint32_t scc_partno; + void *scm_ram_base; + void *scc_base; + uint32_t ram_partitions, ram_partition_size, ram_size; + uint32_t scm_version_register; + struct timespec stime; + struct timespec curtime; + long scm_rd_timeout = 0; + long cur_ns = 0; + long start_ns = 0; + + scc_base = ioremap((uint32_t) res[0].start, 0x140); + if (scc_base == NULL) { + printk(KERN_ERR "FAILED TO MAP SCC REGS\n"); + return; + } + + scm_version_register = __raw_readl(scc_base + SCM_VERSION_REG); + ram_partitions = 1 + ((scm_version_register & SCM_VER_NP_MASK) + >> SCM_VER_NP_SHIFT); + ram_partition_size = (uint32_t) (1 << + ((scm_version_register & SCM_VER_BPP_MASK) + >> SCM_VER_BPP_SHIFT)); + + ram_size = (uint32_t)(ram_partitions * ram_partition_size); + + scm_ram_base = ioremap((uint32_t) res[1].start, ram_size); + + if (scm_ram_base == NULL) { + printk(KERN_ERR "FAILED TO MAP SCC RAM\n"); + return; + } + + /* Wait for any running SCC operations to finish or fail */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - stime.tv_nsec; + else{ + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + && ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_FAIL)); + + /* Check for failures */ + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) { + /* Special message for bad secret key fuses */ + if (reg_value & SCM_STATUS_KST_BAD_KEY) + printk(KERN_ERR "INVALID SCC KEY FUSE PATTERN\n"); + else + printk(KERN_ERR "SECURE RAM FAILURE\n"); + + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + + scm_rd_timeout = 0; + +#ifdef CONFIG_ARCH_MX5 + /* Release all partitions for SCC2 driver on MX53*/ + if (cpu_is_mx53()) + scc_partno = 0; + /* Release final two partitions for SCC2 driver on MX51 */ + else + scc_partno = ram_partitions - + (MX51_SCC_RAM_SIZE / ram_partition_size); +#else + scc_partno = 0; +#endif + + + for (partition_no = scc_partno; partition_no < ram_partitions; + partition_no++) { + reg_value = (((partition_no << SCM_ZCMD_PART_SHIFT) & + SCM_ZCMD_PART_MASK) | ((0x03 << SCM_ZCMD_CCMD_SHIFT) & + SCM_ZCMD_CCMD_MASK)); + __raw_writel(reg_value, scc_base + SCM_ZCMD_REG); + udelay(1); + /* Wait for zeroization to complete */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - + stime.tv_nsec; + else { + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_READY) && ((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_FAIL) && (scm_rd_timeout <= SCM_RD_DELAY)); + + if (scm_rd_timeout > SCM_RD_DELAY) + printk(KERN_ERR "SCM Status Register Read timeout" + "for Partition No:%d", partition_no); + + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + break; + } + + /* 4 partitions on MX53 */ + if (cpu_is_mx53()) + reg_mask = 0xFF; + + /*Check all expected partitions released */ + reg_value = __raw_readl(scc_base + SCM_PART_OWNERS_REG); + if ((reg_value & reg_mask) != 0) { + printk(KERN_ERR "FAILED TO RELEASE IRAM PARTITION\n"); + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + + /* we are done if this is MX53, since no sharing of IRAM and SCC_RAM */ + if (cpu_is_mx53()) + goto exit; + + reg_mask = 0; + scm_rd_timeout = 0; + /* Allocate remaining partitions for general use */ + for (partition_no = 0; partition_no < scc_partno; partition_no++) { + /* Supervisor mode claims a partition for it's own use + by writing zero to SMID register.*/ + __raw_writel(0, scc_base + (SCM_SMID0_REG + 8 * partition_no)); + + /* Wait for any zeroization to complete */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - + stime.tv_nsec; + else{ + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_READY) && ((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_FAIL) && (scm_rd_timeout <= SCM_RD_DELAY)); + + if (scm_rd_timeout > SCM_RD_DELAY) + printk(KERN_ERR "SCM Status Register Read timeout" + "for Partition No:%d", partition_no); + + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + break; + /* Set UMID=0 and permissions for universal data + read/write access */ + MAP_base = scm_ram_base + + (uint32_t) (partition_no * ram_partition_size); + UMID_base = (uint8_t *) MAP_base + 0x10; + for (i = 0; i < 16; i++) + UMID_base[i] = 0; + + MAP_base[0] = (SCM_PERM_NO_ZEROIZE | SCM_PERM_HD_SUP_DISABLE | + SCM_PERM_HD_READ | SCM_PERM_HD_WRITE | + SCM_PERM_HD_EXECUTE | SCM_PERM_TH_READ | + SCM_PERM_TH_WRITE); + reg_mask |= (3 << (2 * (partition_no))); + } + + /* Check all expected partitions allocated */ + reg_value = __raw_readl(scc_base + SCM_PART_OWNERS_REG); + if ((reg_value & reg_mask) != reg_mask) { + printk(KERN_ERR "FAILED TO ACQUIRE IRAM PARTITION\n"); + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + +exit: + iounmap(scm_ram_base); + iounmap(scc_base); + printk(KERN_INFO "IRAM READY\n"); +} + + +struct platform_device *__init imx_add_mxc_scc2( + const struct imx_mxc_scc2_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->ram_start, + .end = data->ram_start + SZ_128K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq_smn, + .end = data->irq_smn, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq_scm, + .end = data->irq_scm, + .flags = IORESOURCE_IRQ, + }, + }; + + mxc_init_scc_iram(res); + + return imx_add_platform_device("mxc_scc", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-spdc-fb.c b/arch/arm/plat-mxc/devices/platform-imx-spdc-fb.c new file mode 100644 index 00000000..72010e29 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-spdc-fb.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_spdc_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _SIPIX_BASE_ADDR, \ + .irq = soc ## _INT_SPDC, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_epdc_data imx6sl_spdc_data __initconst = + imx_spdc_data_entry_single(MX6SL, SZ_16K); +#endif + +struct platform_device *__init imx_add_imx_spdc( + const struct imx_epdc_data *data, + const struct imx_spdc_fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device_dmamask("imx_spdc_fb", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-spdif-audio.c b/arch/arm/plat-mxc/devices/platform-imx-spdif-audio.c new file mode 100644 index 00000000..4a0cb7bf --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-spdif-audio.c @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +struct platform_device *__init imx_add_spdif_audio_device(void) +{ + return imx_add_platform_device("imx-spdif-audio-device", 0, + NULL, 0, NULL, 0); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-spdif-dai.c b/arch/arm/plat-mxc/devices/platform-imx-spdif-dai.c new file mode 100644 index 00000000..7e0a97b1 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-spdif-dai.c @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define MXC_SPDIF_TX_REG 0x2C +#define MXC_SPDIF_RX_REG 0x14 + +#define imx_spdif_dai_data_entry(soc) \ + { \ + .iobase = soc ## _SPDIF_BASE_ADDR, \ + .dmatx = soc ## _DMA_REQ_SPDIF_TX, \ + .dmarx = soc ## _DMA_REQ_SPDIF_RX, \ + } + +#ifdef CONFIG_SOC_IMX51 +const struct imx_spdif_dai_data imx51_spdif_dai_data __initconst = { + .iobase = MX51_SPDIF_BASE_ADDR, + .dmatx = MX51_DMA_REQ_SPDIF, + }; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_spdif_dai_data imx53_spdif_dai_data __initconst = + imx_spdif_dai_data_entry(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_spdif_dai_data imx6q_spdif_dai_data __initconst = + imx_spdif_dai_data_entry(MX6Q); +#endif /* #ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_spdif_dai( + const struct imx_spdif_dai_data *data) +{ + struct resource res[] = { + { + .name = "tx_reg", + .start = data->iobase + MXC_SPDIF_TX_REG, + .end = data->iobase + MXC_SPDIF_TX_REG, + .flags = IORESOURCE_DMA, + }, { + .name = "rx_reg", + .start = data->iobase + MXC_SPDIF_RX_REG, + .end = data->iobase + MXC_SPDIF_RX_REG, + .flags = IORESOURCE_DMA, + }, { + .name = "tx", + .start = data->dmatx, + .end = data->dmatx, + .flags = IORESOURCE_DMA, + }, { + .name = "rx", + .start = data->dmarx, + .end = data->dmarx, + .flags = IORESOURCE_DMA, + }, + }; + + return imx_add_platform_device("imx-spdif-dai", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-spdif.c b/arch/arm/plat-mxc/devices/platform-imx-spdif.c new file mode 100644 index 00000000..90a58899 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-spdif.c @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx5_spdif_data_entry_single(soc) \ + { \ + .iobase = soc ## _SPDIF_BASE_ADDR, \ + .irq = soc ## _INT_SPDIF, \ + } + +#ifdef CONFIG_SOC_IMX50 +const struct imx_spdif_data imx50_imx_spdif_data __initconst = + imx5_spdif_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_spdif_data imx51_imx_spdif_data __initconst = + imx5_spdif_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_spdif_data imx53_imx_spdif_data __initconst = + imx5_spdif_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_spdif_data imx6q_imx_spdif_data __initconst = + imx5_spdif_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_spdif( + const struct imx_spdif_data *data, + const struct mxc_spdif_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + 0x50, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_spdif", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c new file mode 100755 index 00000000..6e62967c --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2010-2012 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_SSI ## _hwid, \ + .dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \ + .dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \ + .dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \ + .dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = { +#define imx21_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K) + imx21_imx_ssi_data_entry(0, 1), + imx21_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst = { +#define imx25_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX25, _id, _hwid, SZ_4K) + imx25_imx_ssi_data_entry(0, 1), + imx25_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = { +#define imx27_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_ssi_data_entry(0, 1), + imx27_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = { +#define imx31_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_ssi_data_entry(0, 1), + imx31_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { +#define imx35_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K) + imx35_imx_ssi_data_entry(0, 1), + imx35_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { +#define imx51_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_ssi_data_entry(0, 1), + imx51_imx_ssi_data_entry(1, 2), + imx51_imx_ssi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_ssi_data imx53_imx_ssi_data[] __initconst = { +#define imx53_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX53, _id, _hwid, SZ_4K) + imx53_imx_ssi_data_entry(0, 1), + imx53_imx_ssi_data_entry(1, 2), + imx53_imx_ssi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx_ssi_data imx6_imx_ssi_data[] __initconst = { +#define imx6q_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX6Q, _id, _hwid, SZ_4K) + imx6q_imx_ssi_data_entry(0, 1), + imx6q_imx_ssi_data_entry(1, 2), + imx6q_imx_ssi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_imx_ssi( + const struct imx_imx_ssi_data *data, + const struct imx_ssi_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, +#define DMARES(_name) { \ + .name = #_name, \ + .start = data->dma ## _name, \ + .end = data->dma ## _name, \ + .flags = IORESOURCE_DMA, \ +} + DMARES(tx0), + DMARES(rx0), + DMARES(tx1), + DMARES(rx1), + }; + + return imx_add_platform_device("imx-ssi", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c new file mode 100644 index 00000000..e76b026b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -0,0 +1,199 @@ +/* + * Copyright (C) 2009-2012 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irqrx = soc ## _INT_UART ## _hwid ## RX, \ + .irqtx = soc ## _INT_UART ## _hwid ## TX, \ + .irqrts = soc ## _INT_UART ## _hwid ## RTS, \ + } + +#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_UART ## _hwid, \ + } + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst = { +#define imx1_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_3irq_data_entry(MX1, _id, _hwid, 0xd0) + imx1_imx_uart_data_entry(0, 1), + imx1_imx_uart_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = { +#define imx21_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K) + imx21_imx_uart_data_entry(0, 1), + imx21_imx_uart_data_entry(1, 2), + imx21_imx_uart_data_entry(2, 3), + imx21_imx_uart_data_entry(3, 4), +}; +#endif + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = { +#define imx25_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_imx_uart_data_entry(0, 1), + imx25_imx_uart_data_entry(1, 2), + imx25_imx_uart_data_entry(2, 3), + imx25_imx_uart_data_entry(3, 4), + imx25_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = { +#define imx27_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_uart_data_entry(0, 1), + imx27_imx_uart_data_entry(1, 2), + imx27_imx_uart_data_entry(2, 3), + imx27_imx_uart_data_entry(3, 4), + imx27_imx_uart_data_entry(4, 5), + imx27_imx_uart_data_entry(5, 6), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = { +#define imx31_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_uart_data_entry(0, 1), + imx31_imx_uart_data_entry(1, 2), + imx31_imx_uart_data_entry(2, 3), + imx31_imx_uart_data_entry(3, 4), + imx31_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = { +#define imx35_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K) + imx35_imx_uart_data_entry(0, 1), + imx35_imx_uart_data_entry(1, 2), + imx35_imx_uart_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX50 +const struct imx_imx_uart_1irq_data imx50_imx_uart_data[] __initconst = { +#define imx50_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX50, _id, _hwid, SZ_4K) + imx50_imx_uart_data_entry(0, 1), + imx50_imx_uart_data_entry(1, 2), + imx50_imx_uart_data_entry(2, 3), + imx50_imx_uart_data_entry(3, 4), + imx50_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = { +#define imx51_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_uart_data_entry(0, 1), + imx51_imx_uart_data_entry(1, 2), + imx51_imx_uart_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { +#define imx53_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX53, _id, _hwid, SZ_4K) + imx53_imx_uart_data_entry(0, 1), + imx53_imx_uart_data_entry(1, 2), + imx53_imx_uart_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx_uart_1irq_data imx6q_imx_uart_data[] __initconst = { +#define imx6q_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX6Q, _id, _hwid, SZ_4K) + imx6q_imx_uart_data_entry(0, 1), + imx6q_imx_uart_data_entry(1, 2), + imx6q_imx_uart_data_entry(2, 3), + imx6q_imx_uart_data_entry(3, 4), + imx6q_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +#ifdef CONFIG_SOC_IMX6SL +const struct imx_imx_uart_1irq_data imx6sl_imx_uart_data[] __initconst = { +#define imx6sl_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX6SL, _id, _hwid, SZ_4K) + imx6sl_imx_uart_data_entry(0, 1), + imx6sl_imx_uart_data_entry(1, 2), + imx6sl_imx_uart_data_entry(2, 3), + imx6sl_imx_uart_data_entry(3, 4), + imx6sl_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX6SL */ + +struct platform_device *__init imx_add_imx_uart_3irq( + const struct imx_imx_uart_3irq_data *data, + const struct imxuart_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irqrx, + .end = data->irqrx, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irqtx, + .end = data->irqtx, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irqrts, + .end = data->irqrx, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-uart", data->id, res, + ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + +struct platform_device *__init imx_add_imx_uart_1irq( + const struct imx_imx_uart_1irq_data *data, + const struct imxuart_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-uart", data->id, res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-vdoa.c b/arch/arm/plat-mxc/devices/platform-imx-vdoa.c new file mode 100644 index 00000000..057fda6b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-vdoa.c @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_vdoa_data_entry_single(soc, _id, _hwid, size) \ + { \ + .id = _id, \ + .iobase = soc ## _VDOA ## _hwid ## _BASE_ADDR, \ + .iosize = size, \ + .irq = soc ## _INT_VDOA ## _hwid, \ + } + +#define imx_vdoa_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_vdoa_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX6Q +#define MX6Q_VDOA_BASE_ADDR VDOA_BASE_ADDR +#define SOC_VDOA_BASE_ADDR MX6Q_VDOA_BASE_ADDR +#define MX6Q_INT_VDOA MXC_INT_VDOA +const struct imx_vdoa_data imx6q_vdoa_data __initconst = + imx_vdoa_data_entry_single(MX6Q, 0, , SZ_4K); +#endif + +struct platform_device *__init imx_add_vdoa( + const struct imx_vdoa_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_vdoa", -1, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx-viim.c b/arch/arm/plat-mxc/devices/platform-imx-viim.c new file mode 100644 index 00000000..89c611d5 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-viim.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/fsl_devices.h> + +#ifdef CONFIG_SOC_IMX51 +#define GPT_REG_BASE_ADDR (MX50_GPT1_BASE_ADDR) +const struct imx_viim_data imx50_viim_data = { + .iobase = MX50_OCOTP_CTRL_BASE_ADDR, +}; +#endif + +#ifdef CONFIG_SOC_IMX6Q +#define GPT_REG_BASE_ADDR (GPT_BASE_ADDR) +const struct imx_viim_data imx6q_viim_data = { + .iobase = OCOTP_BASE_ADDR, +}; +#endif + +struct platform_device *__init imx_add_viim( + const struct imx_viim_data *data) +{ + struct resource res[] = { + [0] = { + .start = GPT_REG_BASE_ADDR, + .end = GPT_REG_BASE_ADDR + PAGE_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = data->iobase, + .end = data->iobase + PAGE_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("mxs_viim", 0, + res, ARRAY_SIZE(res), NULL, 0); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c new file mode 100644 index 00000000..53cfb8dd --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_WDOG ## _hwid, \ + } +#define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx2_wdt_data imx25_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX25, 0, , SZ_16K); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx2_wdt_data imx31_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX31, 0, , SZ_16K); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx2_wdt_data imx35_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX35, 0, , SZ_16K); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx2_wdt_data imx51_imx2_wdt_data[] __initconst = { +#define imx51_imx2_wdt_data_entry(_id, _hwid) \ + imx_imx2_wdt_data_entry(MX51, _id, _hwid, SZ_16K) + imx51_imx2_wdt_data_entry(0, 1), + imx51_imx2_wdt_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx2_wdt_data imx53_imx2_wdt_data[] __initconst = { +#define imx53_imx2_wdt_data_entry(_id, _hwid) \ + imx_imx2_wdt_data_entry(MX53, _id, _hwid, SZ_16K) + imx53_imx2_wdt_data_entry(0, 1), + imx53_imx2_wdt_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_imx2_wdt_data imx6q_imx2_wdt_data[] __initconst = { +#define imx6q_imx2_wdt_data_entry(_id, _hwid) \ + imx_imx2_wdt_data_entry(MX6Q, _id, _hwid, SZ_16K) + imx6q_imx2_wdt_data_entry(0, 1), + imx6q_imx2_wdt_data_entry(1, 2), +}; +#endif + +struct platform_device *__init imx_add_imx2_wdt( + const struct imx_imx2_wdt_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device("imx2-wdt", data->id, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/plat-mxc/devices/platform-imx21-hcd.c new file mode 100644 index 00000000..5770a42f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx21-hcd.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx21_hcd_data_entry_single(soc) \ + { \ + .iobase = soc ## _USBOTG_BASE_ADDR, \ + .irq = soc ## _INT_USBHOST, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst = + imx_imx21_hcd_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +struct platform_device *__init imx_add_imx21_hcd( + const struct imx_imx21_hcd_data *data, + const struct mx21_usbh_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("imx21-hcd", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx_dvfs.c b/arch/arm/plat-mxc/devices/platform-imx_dvfs.c new file mode 100755 index 00000000..ae62ff9b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_dvfs.c @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Jason Chen <jason.chen@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_dvfs_core_data_entry_single(soc) \ + { \ + .iobase = soc ## _DVFSCORE_BASE_ADDR, \ + .irq = soc ## _INT_GPC1, \ + } + +#ifdef CONFIG_SOC_IMX50 +const struct imx_dvfs_core_data imx50_dvfs_core_data __initconst = + imx_dvfs_core_data_entry_single(MX50); +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_dvfs_core_data imx51_dvfs_core_data __initconst = + imx_dvfs_core_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_dvfs_core_data imx53_dvfs_core_data __initconst = + imx_dvfs_core_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_dvfs_core_data imx6q_dvfs_core_data __initconst = + imx_dvfs_core_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_dvfs_core( + const struct imx_dvfs_core_data *data, + const struct mxc_dvfs_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + 4 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx_dvfscore", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + +struct platform_device *__init imx_add_busfreq() +{ + return imx_add_platform_device("imx_busfreq", 0, + NULL, 0, NULL, 0); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c b/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c new file mode 100755 index 00000000..c5b4d992 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c @@ -0,0 +1,239 @@ +/* + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/clk.h> + +#define imx5_ipuv3_data_entry_single(soc, size, ipu_init, ipu_pg) \ + { \ + .iobase = soc ## _IPU_CTRL_BASE_ADDR, \ + .irq_err = soc ## _INT_IPU_ERR, \ + .irq = soc ## _INT_IPU_SYN, \ + .irq_start = MXC_IPU_IRQ_START, \ + .iosize = size, \ + .init = ipu_init, \ + .pg = ipu_pg, \ + } + +#define imx6_ipuv3_data_entry_single(soc, id, size, ipu_init, ipu_pg) \ + { \ + .iobase = soc ## _IPU ## id ## _ARB_BASE_ADDR, \ + .irq_err = soc ## _INT_IPU ## id ## _ERR, \ + .irq = soc ## _INT_IPU ## id ## _SYN, \ + .irq_start = MXC_IPU_IRQ_START, \ + .iosize = size, \ + .init = ipu_init, \ + .pg = ipu_pg, \ + } + +#ifdef CONFIG_SOC_IMX51 +/* + * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by + * the Freescale marketing division. However this did not remove the + * hardware from the chip which still needs to be configured... + */ +static int __init ipu_mipi_setup(void) +{ + struct clk *hsc_clk; + void __iomem *hsc_addr; + int ret = 0; + + hsc_addr = ioremap(MX51_MIPI_HSC_BASE_ADDR, PAGE_SIZE); + if (!hsc_addr) + return -ENOMEM; + + hsc_clk = clk_get_sys(NULL, "mipi_hsp"); + if (IS_ERR(hsc_clk)) { + ret = PTR_ERR(hsc_clk); + goto unmap; + } + clk_enable(hsc_clk); + + /* setup MIPI module to legacy mode */ + writel(0xF00, hsc_addr); + + /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */ + writel(readl(hsc_addr + 0x800) | 0x30ff, + hsc_addr + 0x800); + + clk_disable(hsc_clk); + clk_put(hsc_clk); +unmap: + iounmap(hsc_addr); + + return ret; +} + +int __init mx51_ipuv3_init(int id) +{ + int ret = 0; + u32 val; + + ret = ipu_mipi_setup(); + + /* hard reset the IPU */ + val = readl(MX51_IO_ADDRESS(MX51_SRC_BASE_ADDR)); + val |= 1 << 3; + writel(val, MX51_IO_ADDRESS(MX51_SRC_BASE_ADDR)); + + return ret; +} + +void mx51_ipuv3_pg(int enable) +{ + if (enable) { + writel(MXC_PGCR_PCR, MX51_PGC_IPU_PGCR); + writel(MXC_PGSR_PSR, MX51_PGC_IPU_PGSR); + } else { + writel(0x0, MX51_PGC_IPU_PGCR); + if (readl(MX51_PGC_IPU_PGSR) & MXC_PGSR_PSR) + printk(KERN_DEBUG "power gating successful\n"); + writel(MXC_PGSR_PSR, MX51_PGC_IPU_PGSR); + } +} + +const struct imx_ipuv3_data imx51_ipuv3_data __initconst = + imx5_ipuv3_data_entry_single(MX51, SZ_512M, + mx51_ipuv3_init, mx51_ipuv3_pg); +#endif + +#ifdef CONFIG_SOC_IMX53 +int __init mx53_ipuv3_init(int id) +{ + int ret = 0; + u32 val; + + /* hard reset the IPU */ + val = readl(MX53_IO_ADDRESS(MX53_SRC_BASE_ADDR)); + val |= 1 << 3; + writel(val, MX53_IO_ADDRESS(MX53_SRC_BASE_ADDR)); + + return ret; +} + +void mx53_ipuv3_pg(int enable) +{ + if (enable) { + writel(MXC_PGCR_PCR, MX53_PGC_IPU_PGCR); + writel(MXC_PGSR_PSR, MX53_PGC_IPU_PGSR); + } else { + writel(0x0, MX53_PGC_IPU_PGCR); + if (readl(MX53_PGC_IPU_PGSR) & MXC_PGSR_PSR) + printk(KERN_DEBUG "power gating successful\n"); + writel(MXC_PGSR_PSR, MX53_PGC_IPU_PGSR); + } +} + +const struct imx_ipuv3_data imx53_ipuv3_data __initconst = + imx5_ipuv3_data_entry_single(MX53, SZ_128M, + mx53_ipuv3_init, mx53_ipuv3_pg); +#endif + +#ifdef CONFIG_SOC_IMX6Q +int __init mx6q_ipuv3_init(int id) +{ + int ret = 0; + u32 val; + + /* hard reset the IPU */ + val = readl(MX6_IO_ADDRESS(SRC_BASE_ADDR)); + if (id == 0) + val |= 1 << 3; + else + val |= 1 << 12; + writel(val, MX6_IO_ADDRESS(SRC_BASE_ADDR)); + + return ret; +} + +void mx6q_ipuv3_pg(int enable) +{ + /*TODO*/ +} + +const struct imx_ipuv3_data imx6q_ipuv3_data[] __initconst = { + imx6_ipuv3_data_entry_single(MX6Q, 1, SZ_4M, + mx6q_ipuv3_init, mx6q_ipuv3_pg), + imx6_ipuv3_data_entry_single(MX6Q, 2, SZ_4M, + mx6q_ipuv3_init, mx6q_ipuv3_pg), +}; +#endif + +struct platform_device *__init imx_add_ipuv3( + const int id, + const struct imx_ipuv3_data *data, + struct imx_ipuv3_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq_err, + .end = data->irq_err, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + pdata->init = data->init; + pdata->pg = data->pg; + + return imx_add_platform_device_dmamask("imx-ipuv3", id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), + DMA_BIT_MASK(32)); +} + +struct platform_device *__init imx_add_ipuv3_fb( + const int id, + const struct ipuv3_fb_platform_data *pdata) +{ + if (pdata->res_size[0] > 0) { + struct resource res[] = { + { + .start = pdata->res_base[0], + .end = pdata->res_base[0] + pdata->res_size[0] - 1, + .flags = IORESOURCE_MEM, + }, { + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM, + }, + }; + + if (pdata->res_size[1] > 0) { + res[1].start = pdata->res_base[1]; + res[1].end = pdata->res_base[1] + + pdata->res_size[1] - 1; + } + + return imx_add_platform_device_dmamask("mxc_sdc_fb", + id, res, ARRAY_SIZE(res), pdata, + sizeof(*pdata), DMA_BIT_MASK(32)); + } else + return imx_add_platform_device_dmamask("mxc_sdc_fb", id, + NULL, 0, pdata, sizeof(*pdata), + DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx_ldb.c b/arch/arm/plat-mxc/devices/platform-imx_ldb.c new file mode 100644 index 00000000..a0919a7b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_ldb.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/clk.h> + +#define imx_ldb_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _IOMUXC_BASE_ADDR, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX53 +const struct imx_ldb_data imx53_ldb_data __initconst = + imx_ldb_data_entry_single(MX53, SZ_4K); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_ldb_data imx6q_ldb_data __initconst = + imx_ldb_data_entry_single(MX6Q, SZ_4K); +#endif + +struct platform_device *__init imx_add_ldb( + const struct imx_ldb_data *data, + struct fsl_mxc_ldb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("mxc_ldb", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx_snvs_rtc.c b/arch/arm/plat-mxc/devices/platform-imx_snvs_rtc.c new file mode 100644 index 00000000..031a0741 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_snvs_rtc.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_snvs_rtc_data_entry_single(soc) \ + { \ + .iobase = soc ## _SNVS_BASE_ADDR, \ + .irq = soc ## _INT_SNVS, \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_snvs_rtc_data imx6q_imx_snvs_rtc_data __initconst = + imx_snvs_rtc_data_entry_single(MX6Q); +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_snvs_rtc( + const struct imx_snvs_rtc_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("snvs_rtc", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx_srtc.c b/arch/arm/plat-mxc/devices/platform-imx_srtc.c new file mode 100755 index 00000000..9e4191ec --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_srtc.c @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_srtc_data_entry_single(soc) \ + { \ + .iobase = soc ## _SRTC_BASE_ADDR, \ + .irq = soc ## _INT_SRTC_NTZ, \ + } + +#ifdef CONFIG_SOC_IMX50 +const struct imx_srtc_data imx50_imx_srtc_data __initconst = + imx_imx_srtc_data_entry_single(MX50); +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_srtc_data imx51_imx_srtc_data __initconst = + imx_imx_srtc_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_srtc_data imx53_imx_srtc_data __initconst = + imx_imx_srtc_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +struct platform_device *__init imx_add_srtc( + const struct imx_srtc_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_rtc", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx_tve.c b/arch/arm/plat-mxc/devices/platform-imx_tve.c new file mode 100755 index 00000000..6dc23d53 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_tve.c @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Jason Chen <jason.chen@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx5_tve_data_entry_single(soc) \ + { \ + .iobase = soc ## _TVE_BASE_ADDR, \ + .irq = soc ## _INT_TVE, \ + } + +#ifdef CONFIG_SOC_IMX51 +const struct imx_tve_data imx51_tve_data __initconst = + imx5_tve_data_entry_single(MX51); +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_tve_data imx53_tve_data __initconst = + imx5_tve_data_entry_single(MX53); +#endif /* ifdef CONFIG_SOC_IMX53 */ + +struct platform_device *__init imx_add_tve( + const struct imx_tve_data *data, + const struct fsl_mxc_tve_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_tve", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/plat-mxc/devices/platform-imx_udc.c new file mode 100644 index 00000000..6fd675df --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_udc.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imx_udc_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _USBD_BASE_ADDR, \ + .iosize = _size, \ + .irq0 = soc ## _INT_USBD0, \ + .irq1 = soc ## _INT_USBD1, \ + .irq2 = soc ## _INT_USBD2, \ + .irq3 = soc ## _INT_USBD3, \ + .irq4 = soc ## _INT_USBD4, \ + .irq5 = soc ## _INT_USBD5, \ + .irq6 = soc ## _INT_USBD6, \ + } + +#define imx_imx_udc_data_entry(soc, _size) \ + [_id] = imx_imx_udc_data_entry_single(soc, _size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_udc_data imx1_imx_udc_data __initconst = + imx_imx_udc_data_entry_single(MX1, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +struct platform_device *__init imx_add_imx_udc( + const struct imx_imx_udc_data *data, + const struct imxusb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq0, + .end = data->irq0, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq1, + .end = data->irq1, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq2, + .end = data->irq2, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq3, + .end = data->irq3, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq4, + .end = data->irq4, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq5, + .end = data->irq5, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq6, + .end = data->irq6, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx_udc", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-imx_vpu.c b/arch/arm/plat-mxc/devices/platform-imx_vpu.c new file mode 100755 index 00000000..f0295ad1 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_vpu.c @@ -0,0 +1,179 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * Jason Chen <jason.chen@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx5_vpu_data_entry_single(soc, flag, size, vpu_reset, vpu_pg) \ + { \ + .iobase = soc ## _VPU_BASE_ADDR, \ + .irq_ipi = soc ## _INT_VPU, \ + .iram_enable = flag, \ + .iram_size = size, \ + .reset = vpu_reset, \ + .pg = vpu_pg, \ + } + +#define imx6_vpu_data_entry_single(soc, flag, size, vpu_reset, vpu_pg) \ + { \ + .iobase = soc ## _VPU_BASE_ADDR, \ + .irq_ipi = soc ## _INT_VPU_IPI, \ + .irq_jpg = soc ## _INT_VPU_JPG, \ + .iram_enable = flag, \ + .iram_size = size, \ + .reset = vpu_reset, \ + .pg = vpu_pg, \ + } + +#ifdef CONFIG_SOC_IMX51 +void mx51_vpu_reset(void) +{ + u32 reg; + void __iomem *src_base; + + src_base = ioremap(MX51_SRC_BASE_ADDR, PAGE_SIZE); + + /* mask interrupt due to vpu passed reset */ + reg = __raw_readl(src_base + 0x18); + reg |= 0x02; + __raw_writel(reg, src_base + 0x18); + + reg = __raw_readl(src_base); + reg |= 0x5; /* warm reset vpu */ + __raw_writel(reg, src_base); + while (__raw_readl(src_base) & 0x04) + ; + + iounmap(src_base); +} + +void mx51_vpu_pg(int enable) +{ + if (enable) { + __raw_writel(MXC_PGCR_PCR, MX51_PGC_VPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MX51_PGC_VPU_PGSR); + } else { + __raw_writel(0x0, MX51_PGC_VPU_PGCR); + if (__raw_readl(MX51_PGC_VPU_PGSR) & MXC_PGSR_PSR) + printk(KERN_DEBUG "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MX51_PGC_VPU_PGSR); + } +} +const struct imx_vpu_data imx51_vpu_data __initconst = + imx5_vpu_data_entry_single(MX51, + false, 0x14000, mx51_vpu_reset, mx51_vpu_pg); +#endif + +#ifdef CONFIG_SOC_IMX53 +void mx53_vpu_reset(void) +{ + u32 reg; + void __iomem *src_base; + + src_base = ioremap(MX53_SRC_BASE_ADDR, PAGE_SIZE); + + /* mask interrupt due to vpu passed reset */ + reg = __raw_readl(src_base + 0x18); + reg |= 0x02; + __raw_writel(reg, src_base + 0x18); + + reg = __raw_readl(src_base); + reg |= 0x5; /* warm reset vpu */ + __raw_writel(reg, src_base); + while (__raw_readl(src_base) & 0x04) + ; + + iounmap(src_base); +} + +void mx53_vpu_pg(int enable) +{ + if (enable) { + __raw_writel(MXC_PGCR_PCR, MX53_PGC_VPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MX53_PGC_VPU_PGSR); + } else { + __raw_writel(0x0, MX53_PGC_VPU_PGCR); + if (__raw_readl(MX53_PGC_VPU_PGSR) & MXC_PGSR_PSR) + printk(KERN_DEBUG "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MX53_PGC_VPU_PGSR); + } +} + +const struct imx_vpu_data imx53_vpu_data __initconst = + imx5_vpu_data_entry_single(MX53, + true, 0x14000, mx53_vpu_reset, mx53_vpu_pg); +#endif + +#ifdef CONFIG_SOC_IMX6Q +void mx6q_vpu_reset(void) +{ + u32 reg; + void __iomem *src_base; + + src_base = ioremap(SRC_BASE_ADDR, PAGE_SIZE); + + /* mask interrupt due to vpu passed reset */ + reg = __raw_readl(src_base + 0x18); + reg |= 0x02; + __raw_writel(reg, src_base + 0x18); + + reg = __raw_readl(src_base); + reg |= 0x4; /* warm reset vpu */ + __raw_writel(reg, src_base); + while (__raw_readl(src_base) & 0x04) + ; + + iounmap(src_base); +} + +const struct imx_vpu_data imx6q_vpu_data __initconst = + imx6_vpu_data_entry_single(MX6Q, + true, 0x21000, mx6q_vpu_reset, NULL); +#endif + +struct platform_device *__init imx_add_vpu( + const struct imx_vpu_data *data) +{ + struct mxc_vpu_platform_data pdata; + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .name = "vpu_regs", + .flags = IORESOURCE_MEM, + }, { + .start = data->irq_ipi, + .end = data->irq_ipi, + .name = "vpu_ipi_irq", + .flags = IORESOURCE_IRQ, + }, +#ifdef CONFIG_SOC_IMX6Q + { + .start = data->irq_jpg, + .end = data->irq_jpg, + .name = "vpu_jpu_irq", + .flags = IORESOURCE_IRQ, + }, +#endif + }; + + pdata.reset = data->reset; + pdata.pg = data->pg; + pdata.iram_enable = data->iram_enable; + pdata.iram_size = data->iram_size; + + if (!fuse_dev_is_available(MXC_DEV_VPU)) + return ERR_PTR(-ENODEV); + + if (cpu_is_mx6dl()) + pdata.iram_enable = false; + + return imx_add_platform_device("mxc_vpu", -1, + res, ARRAY_SIZE(res), &pdata, sizeof(pdata)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c new file mode 100644 index 00000000..805336fd --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_imxdi_rtc_data_entry_single(soc) \ + { \ + .iobase = soc ## _DRYICE_BASE_ADDR, \ + .irq = soc ## _INT_DRYICE, \ + } + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imxdi_rtc_data imx25_imxdi_rtc_data __initconst = + imx_imxdi_rtc_data_entry_single(MX25); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +struct platform_device *__init imx_add_imxdi_rtc( + const struct imx_imxdi_rtc_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imxdi_rtc", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/plat-mxc/devices/platform-ipu-core.c new file mode 100644 index 00000000..79d340ae --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-ipu-core.c @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2011 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/dma-mapping.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_ipu_core_entry_single(soc) \ +{ \ + .iobase = soc ## _IPU_CTRL_BASE_ADDR, \ + .synirq = soc ## _INT_IPU_SYN, \ + .errirq = soc ## _INT_IPU_ERR, \ +} + +#ifdef CONFIG_SOC_IMX31 +const struct imx_ipu_core_data imx31_ipu_core_data __initconst = + imx_ipu_core_entry_single(MX31); +#endif + +#ifdef CONFIG_SOC_IMX35 +const struct imx_ipu_core_data imx35_ipu_core_data __initconst = + imx_ipu_core_entry_single(MX35); +#endif + +static struct platform_device *imx_ipu_coredev __initdata; + +struct platform_device *__init imx_add_ipu_core( + const struct imx_ipu_core_data *data, + const struct ipu_platform_data *pdata) +{ + /* The resource order is important! */ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + 0x5f, + .flags = IORESOURCE_MEM, + }, { + .start = data->iobase + 0x88, + .end = data->iobase + 0xb3, + .flags = IORESOURCE_MEM, + }, { + .start = data->synirq, + .end = data->synirq, + .flags = IORESOURCE_IRQ, + }, { + .start = data->errirq, + .end = data->errirq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_ipu_coredev = imx_add_platform_device("ipu-core", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} + +struct platform_device *__init imx_alloc_mx3_camera( + const struct imx_ipu_core_data *data, + const struct mx3_camera_pdata *pdata) +{ + struct resource res[] = { + { + .start = data->iobase + 0x60, + .end = data->iobase + 0x87, + .flags = IORESOURCE_MEM, + }, + }; + int ret = -ENOMEM; + struct platform_device *pdev; + + if (IS_ERR_OR_NULL(imx_ipu_coredev)) + return ERR_PTR(-ENODEV); + + pdev = platform_device_alloc("mx3-camera", 0); + if (!pdev) + goto err; + + pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); + if (!pdev->dev.dma_mask) + goto err; + + *pdev->dev.dma_mask = DMA_BIT_MASK(32); + pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret) + goto err; + + if (pdata) { + struct mx3_camera_pdata *copied_pdata; + + ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); + if (ret) { +err: + kfree(pdev->dev.dma_mask); + platform_device_put(pdev); + return ERR_PTR(-ENODEV); + } + copied_pdata = dev_get_platdata(&pdev->dev); + copied_pdata->dma_dev = &imx_ipu_coredev->dev; + } + + return pdev; +} + +struct platform_device *__init imx_add_mx3_sdc_fb( + const struct imx_ipu_core_data *data, + struct mx3fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase + 0xb4, + .end = data->iobase + 0x1bf, + .flags = IORESOURCE_MEM, + }, + }; + + if (IS_ERR_OR_NULL(imx_ipu_coredev)) + return ERR_PTR(-ENODEV); + + pdata->dma_dev = &imx_ipu_coredev->dev; + + return imx_add_platform_device_dmamask("mx3_sdc_fb", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), + DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/plat-mxc/devices/platform-mx1-camera.c new file mode 100644 index 00000000..edcc581a --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mx1-camera.c @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mx1_camera_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _CSI ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_CSI, \ + } + +#ifdef CONFIG_SOC_IMX1 +const struct imx_mx1_camera_data imx1_mx1_camera_data __initconst = + imx_mx1_camera_data_entry_single(MX1, 10); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +struct platform_device *__init imx_add_mx1_camera( + const struct imx_mx1_camera_data *data, + const struct mx1_camera_pdata *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mx1-camera", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/plat-mxc/devices/platform-mx2-camera.c new file mode 100644 index 00000000..b3f4828d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mx2-camera.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mx2_camera_data_entry_single(soc) \ + { \ + .iobasecsi = soc ## _CSI_BASE_ADDR, \ + .iosizecsi = SZ_4K, \ + .irqcsi = soc ## _INT_CSI, \ + } +#define imx_mx2_camera_data_entry_single_emma(soc) \ + { \ + .iobasecsi = soc ## _CSI_BASE_ADDR, \ + .iosizecsi = SZ_32, \ + .irqcsi = soc ## _INT_CSI, \ + .iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \ + .iosizeemmaprp = SZ_32, \ + .irqemmaprp = soc ## _INT_EMMAPRP, \ + } + +#ifdef CONFIG_SOC_IMX25 +const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst = + imx_mx2_camera_data_entry_single(MX25); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = + imx_mx2_camera_data_entry_single_emma(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_mx2_camera( + const struct imx_mx2_camera_data *data, + const struct mx2_camera_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobasecsi, + .end = data->iobasecsi + data->iosizecsi - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irqcsi, + .end = data->irqcsi, + .flags = IORESOURCE_IRQ, + }, { + .start = data->iobaseemmaprp, + .end = data->iobaseemmaprp + data->iosizeemmaprp - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irqemmaprp, + .end = data->irqemmaprp, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mx2-camera", 0, + res, data->iobaseemmaprp ? 4 : 2, + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c new file mode 100644 index 00000000..984fa296 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/dma-mapping.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> +#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ + { \ + .id = _id, \ + .iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \ + .irq = soc ## _INT_USB_ ## hs, \ + } + +#ifdef CONFIG_SOC_IMX25 +const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX25, 0, OTG); +const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst = + imx_mxc_ehci_data_entry_single(MX25, 1, HS); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX27, 0, OTG); +const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = { + imx_mxc_ehci_data_entry_single(MX27, 1, HS1), + imx_mxc_ehci_data_entry_single(MX27, 2, HS2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX31, 0, OTG); +const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[] __initconst = { + imx_mxc_ehci_data_entry_single(MX31, 1, HS1), + imx_mxc_ehci_data_entry_single(MX31, 2, HS2), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX35, 0, OTG); +const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data __initconst = + imx_mxc_ehci_data_entry_single(MX35, 1, HS); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_mxc_ehci_data imx6q_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX6Q, 0, OTG); +const struct imx_mxc_ehci_data imx6q_mxc_ehci_hs_data[] __initconst = { + imx_mxc_ehci_data_entry_single(MX6Q, 1, HS1), + imx_mxc_ehci_data_entry_single(MX6Q, 2, HS2), + imx_mxc_ehci_data_entry_single(MX6Q, 3, HS3), +}; + +const struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] __initconst = { + imx_mxc_ehci_data_entry_single(MX6SL, 1, HS1), + imx_mxc_ehci_data_entry_single(MX6SL, 2, HS2), + imx_mxc_ehci_data_entry_single(MX6SL, 3, HS3), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_mxc_ehci( + const struct imx_mxc_ehci_data *data, + const struct mxc_usbh_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mxc-ehci", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} +EXPORT_SYMBOL(imx_add_mxc_ehci); + +/* FSL internal non-upstream code */ +struct platform_device *__init imx_add_fsl_ehci( + const struct imx_mxc_ehci_data *data, + const struct fsl_usb2_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + int ret = -ENOMEM; + const char *name = "fsl-ehci"; + int id = data->id; + unsigned int num_resources = ARRAY_SIZE(res); + size_t size_data = sizeof(*pdata); + u64 dmamask = DMA_BIT_MASK(32); + struct platform_device *pdev; + + pdev = platform_device_alloc(name, id); + if (!pdev) + goto err; + + if (dmamask) { + /* + * This memory isn't freed when the device is put, + * I don't have a nice idea for that though. Conceptually + * dma_mask in struct device should not be a pointer. + * See http://thread.gmane.org/gmane.linux.kernel.pci/9081 + */ + pdev->dev.dma_mask = + kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); + if (!pdev->dev.dma_mask) + /* ret is still -ENOMEM; */ + goto err; + + *pdev->dev.dma_mask = dmamask; + pdev->dev.coherent_dma_mask = dmamask; + } + + ret = platform_device_add_resources(pdev, res, num_resources); + if (ret) + goto err; + + if (data) { + ret = platform_device_add_data(pdev, pdata, size_data); + if (ret) + goto err; + } + + return pdev; + +err: + if (dmamask) + kfree(pdev->dev.dma_mask); + platform_device_put(pdev); + return ERR_PTR(ret); + +} +EXPORT_SYMBOL(imx_add_fsl_ehci); diff --git a/arch/arm/plat-mxc/devices/platform-mxc-hdmi-core.c b/arch/arm/plat-mxc/devices/platform-mxc-hdmi-core.c new file mode 100644 index 00000000..2c9a32a9 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc-hdmi-core.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx6_mxc_hdmi_core_data_entry_single(soc, size) \ + { \ + .iobase = soc ## _HDMI_ARB_BASE_ADDR, \ + .iosize = size, \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_mxc_hdmi_core_data imx6q_mxc_hdmi_core_data __initconst = + imx6_mxc_hdmi_core_data_entry_single(MX6Q, SZ_32K + SZ_4K); +#endif + +struct platform_device *__init imx_add_mxc_hdmi_core( + const struct imx_mxc_hdmi_core_data *data, + const struct fsl_mxc_hdmi_core_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_HDMI)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("mxc_hdmi_core", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c new file mode 100644 index 00000000..540d3a7d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <linux/dma-mapping.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_SDHC ## _hwid, \ + .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ + } +#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { +#define imx21_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K) + imx21_mxc_mmc_data_entry(0, 1), + imx21_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { +#define imx27_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_mxc_mmc_data_entry(0, 1), + imx27_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { +#define imx31_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K) + imx31_mxc_mmc_data_entry(0, 1), + imx31_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +struct platform_device *__init imx_add_mxc_mmc( + const struct imx_mxc_mmc_data *data, + const struct imxmmc_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, { + .start = data->dmareq, + .end = data->dmareq, + .flags = IORESOURCE_DMA, + }, + }; + return imx_add_platform_device_dmamask("mxc-mmc", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc_gpu.c b/arch/arm/plat-mxc/devices/platform-mxc_gpu.c new file mode 100755 index 00000000..06ac1560 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_gpu.c @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_gpu_entry_3d_2d(soc) \ + { \ + .irq_3d = soc ## _INT_GPU, \ + .irq_2d = soc ## _INT_GPU2_IRQ, \ + .iobase_3d = soc ## _GPU_BASE_ADDR, \ + .iobase_2d = soc ## _GPU2D_BASE_ADDR, \ + .gmem_base = soc ## _GPU_GMEM_BASE_ADDR, \ + .gmem_size = soc ## _GPU_GMEM_SIZE, \ + } + +#define imx_mxc_gpu_entry_2d(soc) \ + { \ + .irq_2d = soc ## _INT_GPU2_IRQ, \ + .iobase_2d = soc ## _GPU2D_BASE_ADDR, \ + } + +#ifdef CONFIG_SOC_IMX35 +const struct imx_mxc_gpu_data imx35_gpu_data __initconst = + imx_mxc_gpu_entry_2d(MX35); +#endif + +#ifdef CONFIG_SOC_IMX50 +const struct imx_mxc_gpu_data imx50_gpu_data __initconst = + imx_mxc_gpu_entry_2d(MX50); +#endif + +#ifdef CONFIG_SOC_IMX51 +const struct imx_mxc_gpu_data imx51_gpu_data __initconst = + imx_mxc_gpu_entry_3d_2d(MX51); +#endif + +#ifdef CONFIG_SOC_IMX53 +const struct imx_mxc_gpu_data imx53_gpu_data __initconst = + imx_mxc_gpu_entry_3d_2d(MX53); +#endif + +struct platform_device *__init imx_add_mxc_gpu( + const struct imx_mxc_gpu_data *data, + const struct mxc_gpu_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->irq_2d, + .end = data->irq_2d, + .name = "gpu_2d_irq", + .flags = IORESOURCE_IRQ, + }, + { + .start = data->irq_3d, + .end = data->irq_3d, + .name = "gpu_3d_irq", + .flags = IORESOURCE_IRQ, + }, + { + .start = data->iobase_2d, + .end = data->iobase_2d + SZ_4K - 1, + .name = "gpu_2d_registers", + .flags = IORESOURCE_MEM, + }, + { + .start = data->iobase_3d, + .end = data->iobase_3d + SZ_128K - 1, + .name = "gpu_3d_registers", + .flags = IORESOURCE_MEM, + }, + { + .start = data->gmem_base, + .end = data->gmem_base + data->gmem_size - 1, + .name = "gpu_graphics_mem", + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device_dmamask("mxc_gpu", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc_hdmi.c b/arch/arm/plat-mxc/devices/platform-mxc_hdmi.c new file mode 100644 index 00000000..cdbdae49 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_hdmi.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx6_mxc_hdmi_data_entry_single(soc) \ + { \ + .irq = soc ## _INT_HDMI_TX, \ + } + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_mxc_hdmi_data imx6q_mxc_hdmi_data __initconst = + imx6_mxc_hdmi_data_entry_single(MX6Q); +#endif + +struct platform_device *__init imx_add_mxc_hdmi( + const struct imx_mxc_hdmi_data *data, + const struct fsl_mxc_hdmi_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_HDMI)) + return ERR_PTR(-ENODEV); + + imx_add_platform_device("mxc_hdmi_cec", 0, + res, ARRAY_SIZE(res), NULL, 0); + return imx_add_platform_device_dmamask("mxc_hdmi", -1, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} + diff --git a/arch/arm/plat-mxc/devices/platform-mxc_mlb.c b/arch/arm/plat-mxc/devices/platform-mxc_mlb.c new file mode 100644 index 00000000..8925f3ee --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_mlb.c @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#ifdef CONFIG_SOC_IMX53 +struct platform_device *__init imx_add_mlb( + const struct mxc_mlb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = MX53_MLB_BASE_ADDR, + .end = MX53_MLB_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MX53_INT_MLB, + .end = MX53_INT_MLB, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device("mxc_mlb", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q + +struct platform_device *__init imx_add_mlb( + const struct mxc_mlb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = MLB_BASE_ADDR, + .end = MLB_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_MLB, + .end = MXC_INT_MLB, + .flags = IORESOURCE_IRQ, + }, + { + .start = MXC_INT_MLB_AHB0, + .end = MXC_INT_MLB_AHB0, + .flags = IORESOURCE_IRQ, + }, + { + .start = MXC_INT_MLB_AHB1, + .end = MXC_INT_MLB_AHB1, + .flags = IORESOURCE_IRQ, + }, + }; + + if (!fuse_dev_is_available(MXC_DEV_MLB)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device("mxc_mlb150", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} +#endif diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c new file mode 100644 index 00000000..1568f39f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_nand_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _NFC_BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_NFC \ + } + +#define imx_mxc_nandv3_data_entry_single(soc, _size) \ + { \ + .id = -1, \ + .iobase = soc ## _NFC_BASE_ADDR, \ + .iosize = _size, \ + .axibase = soc ## _NFC_AXI_BASE_ADDR, \ + .irq = soc ## _INT_NFC \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX21, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX25, SZ_8K); +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX27, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX31, SZ_4K); +#endif + +#ifdef CONFIG_SOC_IMX35 +const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX35, SZ_8K); +#endif + +#ifdef CONFIG_SOC_IMX51 +const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = + imx_mxc_nandv3_data_entry_single(MX51, SZ_16K); +#endif + +struct platform_device *__init imx_add_mxc_nand( + const struct imx_mxc_nand_data *data, + const struct mxc_nand_platform_data *pdata) +{ + /* AXI has to come first, that's how the mxc_nand driver expect it */ + struct resource res[] = { + { + .start = data->axibase, + .end = data->axibase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device("mxc_nand", data->id, + res + !data->axibase, + ARRAY_SIZE(res) - !data->axibase, + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c new file mode 100755 index 00000000..a8521b97 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _PWM ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_PWM ## _hwid, \ + } +#define imx_mxc_pwm_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_pwm_data imx21_mxc_pwm_data __initconst = + imx_mxc_pwm_data_entry_single(MX21, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_mxc_pwm_data imx25_mxc_pwm_data[] __initconst = { +#define imx25_mxc_pwm_data_entry(_id, _hwid) \ + imx_mxc_pwm_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_mxc_pwm_data_entry(0, 1), + imx25_mxc_pwm_data_entry(1, 2), + imx25_mxc_pwm_data_entry(2, 3), + imx25_mxc_pwm_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst = + imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = { +#define imx51_mxc_pwm_data_entry(_id, _hwid) \ + imx_mxc_pwm_data_entry(MX51, _id, _hwid, SZ_16K) + imx51_mxc_pwm_data_entry(0, 1), + imx51_mxc_pwm_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst = { +#define imx53_mxc_pwm_data_entry(_id, _hwid) \ + imx_mxc_pwm_data_entry(MX53, _id, _hwid, SZ_16K) + imx53_mxc_pwm_data_entry(0, 1), + imx53_mxc_pwm_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_mxc_pwm_data imx6q_mxc_pwm_data[] __initconst = { +#define imx6q_mxc_pwm_data_entry(_id, _hwid) \ + imx_mxc_pwm_data_entry(MX6Q, _id, _hwid, SZ_16K) + imx6q_mxc_pwm_data_entry(0, 1), + imx6q_mxc_pwm_data_entry(1, 2), + imx6q_mxc_pwm_data_entry(2, 3), + imx6q_mxc_pwm_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_mxc_pwm( + const struct imx_mxc_pwm_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_pwm", data->id, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/plat-mxc/devices/platform-mxc_rnga.c new file mode 100644 index 00000000..b4b7612b --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_rnga.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +struct imx_mxc_rnga_data { + resource_size_t iobase; +}; + +#define imx_mxc_rnga_data_entry_single(soc) \ + { \ + .iobase = soc ## _RNGA_BASE_ADDR, \ + } + +#ifdef CONFIG_SOC_IMX31 +static const struct imx_mxc_rnga_data imx31_mxc_rnga_data __initconst = + imx_mxc_rnga_data_entry_single(MX31); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +static struct platform_device *__init imx_add_mxc_rnga( + const struct imx_mxc_rnga_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + }; + return imx_add_platform_device("mxc_rnga", -1, + res, ARRAY_SIZE(res), NULL, 0); +} + +static int __init imxXX_add_mxc_rnga(void) +{ + struct platform_device *ret; + +#if defined(CONFIG_SOC_IMX31) + if (cpu_is_mx31()) + ret = imx_add_mxc_rnga(&imx31_mxc_rnga_data); + else +#endif /* if defined(CONFIG_SOC_IMX31) */ + ret = ERR_PTR(-ENODEV); + + if (IS_ERR(ret)) + return PTR_ERR(ret); + + return 0; +} +arch_initcall(imxXX_add_mxc_rnga); diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/plat-mxc/devices/platform-mxc_rtc.c new file mode 100644 index 00000000..16d0ec4d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_rtc.c @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2010-2011 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_rtc_data_entry_single(soc) \ + { \ + .iobase = soc ## _RTC_BASE_ADDR, \ + .irq = soc ## _INT_RTC, \ + } + +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst = + imx_mxc_rtc_data_entry_single(MX31); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +struct platform_device *__init imx_add_mxc_rtc( + const struct imx_mxc_rtc_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_rtc", -1, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/plat-mxc/devices/platform-mxc_w1.c new file mode 100644 index 00000000..96fa5ea9 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_w1.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_mxc_w1_data_entry_single(soc) \ + { \ + .iobase = soc ## _OWIRE_BASE_ADDR, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX31); +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX35); +#endif /* ifdef CONFIG_SOC_IMX35 */ + +struct platform_device *__init imx_add_mxc_w1( + const struct imx_mxc_w1_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("mxc_w1", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c new file mode 100755 index 00000000..4aaaecc2 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2010 Pengutronix, Wolfram Sang <w.sang@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <mach/esdhc.h> + +#define imx_sdhci_esdhc_imx_data_entry_single(soc, _id, hwid) \ + { \ + .id = _id, \ + .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \ + .irq = soc ## _INT_ESDHC ## hwid, \ + } + +#define imx_sdhci_usdhc_imx_data_entry_single(soc, _id, hwid) \ + { \ + .id = _id, \ + .iobase = soc ## _USDHC ## hwid ## _BASE_ADDR, \ + .irq = soc ## _INT_USDHC ## hwid, \ + } + +#define imx_sdhci_esdhc_imx_data_entry(soc, id, hwid) \ + [id] = imx_sdhci_esdhc_imx_data_entry_single(soc, id, hwid) + +#define imx_sdhci_usdhc_imx_data_entry(soc, id, hwid) \ + [id] = imx_sdhci_usdhc_imx_data_entry_single(soc, id, hwid) + +#ifdef CONFIG_SOC_IMX25 +const struct imx_sdhci_esdhc_imx_data +imx25_sdhci_esdhc_imx_data[] __initconst = { +#define imx25_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX25, _id, _hwid) + imx25_sdhci_esdhc_imx_data_entry(0, 1), + imx25_sdhci_esdhc_imx_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_sdhci_esdhc_imx_data +imx35_sdhci_esdhc_imx_data[] __initconst = { +#define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX35, _id, _hwid) + imx35_sdhci_esdhc_imx_data_entry(0, 1), + imx35_sdhci_esdhc_imx_data_entry(1, 2), + imx35_sdhci_esdhc_imx_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX50 +const struct imx_sdhci_esdhc_imx_data +imx50_sdhci_esdhc_imx_data[] __initconst = { +#define imx50_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX50, _id, _hwid) + imx50_sdhci_esdhc_imx_data_entry(0, 1), + imx50_sdhci_esdhc_imx_data_entry(1, 2), + imx50_sdhci_esdhc_imx_data_entry(2, 3), + imx50_sdhci_esdhc_imx_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_sdhci_esdhc_imx_data +imx51_sdhci_esdhc_imx_data[] __initconst = { +#define imx51_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX51, _id, _hwid) + imx51_sdhci_esdhc_imx_data_entry(0, 1), + imx51_sdhci_esdhc_imx_data_entry(1, 2), + imx51_sdhci_esdhc_imx_data_entry(2, 3), + imx51_sdhci_esdhc_imx_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_sdhci_esdhc_imx_data +imx53_sdhci_esdhc_imx_data[] __initconst = { +#define imx53_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX53, _id, _hwid) + imx53_sdhci_esdhc_imx_data_entry(0, 1), + imx53_sdhci_esdhc_imx_data_entry(1, 2), + imx53_sdhci_esdhc_imx_data_entry(2, 3), + imx53_sdhci_esdhc_imx_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_sdhci_esdhc_imx_data +imx6q_sdhci_usdhc_imx_data[] __initconst = { +#define imx6q_sdhci_usdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_usdhc_imx_data_entry(MX6Q, _id, _hwid) + imx6q_sdhci_usdhc_imx_data_entry(0, 1), + imx6q_sdhci_usdhc_imx_data_entry(1, 2), + imx6q_sdhci_usdhc_imx_data_entry(2, 3), + imx6q_sdhci_usdhc_imx_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_sdhci_esdhc_imx( + const struct imx_sdhci_esdhc_imx_data *data, + const struct esdhc_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device_dmamask("sdhci-esdhc-imx", data->id, res, + ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c new file mode 100644 index 00000000..bbe66e1a --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ + { \ + .devid = _devid, \ + .id = _id, \ + .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_ ## type ## hwid, \ + } + +#define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \ + [id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_spi_imx_data imx1_cspi_data[] __initconst = { +#define imx1_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX1, CSPI, "imx1-cspi", _id, _hwid, SZ_4K) + imx1_cspi_data_entry(0, 1), + imx1_cspi_data_entry(1, 2), +}; +#endif + +#ifdef CONFIG_SOC_IMX21 +const struct imx_spi_imx_data imx21_cspi_data[] __initconst = { +#define imx21_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) + imx21_cspi_data_entry(0, 1), + imx21_cspi_data_entry(1, 2), +}; +#endif + +#ifdef CONFIG_SOC_IMX25 +const struct imx_spi_imx_data imx25_cspi_data[] __initconst = { +#define imx25_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX25, CSPI, "imx25-cspi", _id, _hwid, SZ_16K) + imx25_cspi_data_entry(0, 1), + imx25_cspi_data_entry(1, 2), + imx25_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_spi_imx_data imx27_cspi_data[] __initconst = { +#define imx27_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K) + imx27_cspi_data_entry(0, 1), + imx27_cspi_data_entry(1, 2), + imx27_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_spi_imx_data imx31_cspi_data[] __initconst = { +#define imx31_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K) + imx31_cspi_data_entry(0, 1), + imx31_cspi_data_entry(1, 2), + imx31_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_spi_imx_data imx35_cspi_data[] __initconst = { +#define imx35_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K) + imx35_cspi_data_entry(0, 1), + imx35_cspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX50 +const struct imx_spi_imx_data imx50_cspi_data[] __initconst = { +#define imx50_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX50, CSPI, "imx50-cspi", _id, _hwid, SZ_4K) + imx50_cspi_data_entry(1, 1), + imx50_cspi_data_entry(2, 2), + imx50_cspi_data_entry(3, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX50 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_spi_imx_data imx51_cspi_data __initconst = + imx_spi_imx_data_entry_single(MX51, CSPI, "imx51-cspi", 2, , SZ_4K); + +const struct imx_spi_imx_data imx51_ecspi_data[] __initconst = { +#define imx51_ecspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX51, ECSPI, "imx51-ecspi", _id, _hwid, SZ_4K) + imx51_ecspi_data_entry(0, 1), + imx51_ecspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_spi_imx_data imx53_cspi_data __initconst = + imx_spi_imx_data_entry_single(MX53, CSPI, "imx53-cspi", 0, , SZ_4K); + +const struct imx_spi_imx_data imx53_ecspi_data[] __initconst = { +#define imx53_ecspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX53, ECSPI, "imx53-ecspi", _id, _hwid, SZ_4K) + imx53_ecspi_data_entry(0, 1), + imx53_ecspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_spi_imx_data imx6q_ecspi_data[] __initconst = { +#define imx6q_ecspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX6Q, ECSPI, "imx6q-ecspi", _id, _hwid, SZ_4K) + imx6q_ecspi_data_entry(0, 1), + imx6q_ecspi_data_entry(1, 2), + imx6q_ecspi_data_entry(2, 3), + imx6q_ecspi_data_entry(3, 4), + imx6q_ecspi_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_SOC_IMX6Q */ + +struct platform_device *__init imx_add_spi_imx( + const struct imx_spi_imx_data *data, + const struct spi_imx_master *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device(data->devid, data->id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/devices/platform-viv_gpu.c b/arch/arm/plat-mxc/devices/platform-viv_gpu.c new file mode 100644 index 00000000..52c9b082 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-viv_gpu.c @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/hardware.h> +#include <mach/devices-common.h> + +#ifdef CONFIG_ARCH_MX6 +#ifdef CONFIG_SOC_IMX6SL +const struct imx_viv_gpu_data imx6_gpu_data __initconst = { + .phys_baseaddr = MX6SL_MMDC0_ARB_BASE_ADDR, + .iobase_3d = 0, + .irq_3d = -1, + .iobase_2d = MX6SL_GPU_2D_ARB_BASE_ADDR, + .irq_2d = MXC_INT_GPU2D_IRQ, + .iobase_vg = OPENVG_ARB_BASE_ADDR, + .irq_vg = MXC_INT_OPENVG_XAQ2, +}; +#else +const struct imx_viv_gpu_data imx6_gpu_data __initconst = { + .phys_baseaddr = 0, + .iobase_3d = GPU_3D_ARB_BASE_ADDR, + .irq_3d = MXC_INT_GPU3D_IRQ, + .iobase_2d = GPU_2D_ARB_BASE_ADDR, + .irq_2d = MXC_INT_GPU2D_IRQ, + .iobase_vg = OPENVG_ARB_BASE_ADDR, + .irq_vg = MXC_INT_OPENVG_XAQ2, +}; +#endif +#endif + +struct platform_device *__init imx_add_viv_gpu( + const struct imx_viv_gpu_data *data, + const struct viv_gpu_platform_data *pdata) +{ + u32 res_count = 0; + struct resource res[] = { + { + .name = "phys_baseaddr", + .start = data->phys_baseaddr, + .end = data->phys_baseaddr, + .flags = IORESOURCE_MEM, + }, { + + .name = "iobase_3d", + .start = data->iobase_3d, + .end = data->iobase_3d + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_3d", + .start = data->irq_3d, + .end = data->irq_3d, + .flags = IORESOURCE_IRQ, + }, { + .name = "iobase_2d", + .start = data->iobase_2d, + .end = data->iobase_2d + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_2d", + .start = data->irq_2d, + .end = data->irq_2d, + .flags = IORESOURCE_IRQ, + }, { + .name = "iobase_vg", + .start = data->iobase_vg, + .end = data->iobase_vg + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_vg", + .start = data->irq_vg, + .end = data->irq_vg, + .flags = IORESOURCE_IRQ, + }, + }; + + res_count = ARRAY_SIZE(res); + BUG_ON(!res_count); + + if (!fuse_dev_is_available(MXC_DEV_3D)) { + res[1].start = 0; + res[1].end = 0; + res[2].start = -1; + res[2].end = -1; + } + + if (!fuse_dev_is_available(MXC_DEV_2D)) { + res[3].start = 0; + res[3].end = 0; + res[4].start = -1; + res[4].end = -1; + } + + if (!fuse_dev_is_available(MXC_DEV_OVG)) { + res[5].start = 0; + res[5].end = 0; + res[6].start = -1; + res[6].end = -1; + } + + /* None GPU core exists */ + if ((res[2].start == -1) && + (res[4].start == -1) && + (res[6].start == -1)) + return ERR_PTR(-ENODEV); + + return imx_add_platform_device_dmamask("galcore", 0, + res, res_count, + pdata, sizeof(*pdata), + DMA_BIT_MASK(32)); +} |