1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
bram $__XILINX_URAM288 init 0 abits 12 dbits 72 groups 2 ports 1 1 wrmode 0 1 enable 1 9 transp 0 0 clocks 2 2 clkpol 2 2 endbram match $__XILINX_URAM288 min bits 131072 min efficiency 15 shuffle_enable B make_transp endmatch