aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/intel_alm/common/bram_m10k.txt
blob: 560711b658e94b3508808ca2db29b98d8ce5825c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
bram $__MISTRAL_M10K
    init   0   # TODO: Re-enable when I figure out how BRAM init works
    abits 13   @D8192x1
    dbits  1   @D8192x1
    abits 12   @D4096x2
    dbits  2   @D4096x2
    abits 11   @D2048x5
    dbits  5   @D2048x5
    abits 10   @D1024x10
    dbits 10   @D1024x10
    abits  9   @D512x20
    dbits 20   @D512x20
    groups 2
    ports  1 1
    wrmode 1 0
    # read enable; write enable + byte enables (only for multiples of 8)
    enable 1 1
    transp 0 0
    clocks 1 1
    clkpol 1 1
endbram


match $__MISTRAL_M10K
    min efficiency 5
    make_transp
endmatch