techlibs/anlogic/drams.txt


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bram $__ANLOGIC_DRAM16X4
  init 0
  abits 4
  dbits 4
  groups 2
  ports  1 1
  wrmode 0 1
  enable 0 1
  transp 0 0
  clocks 0 1
  clkpol 0 1
endbram

match $__ANLOGIC_DRAM16X4
  make_outreg
endmatch