1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
|
\documentclass[oneside,a4paper]{book}
\usepackage[T1]{fontenc} % required for luximono!
\usepackage{lmodern}
\usepackage[scaled=0.8]{luximono} % typewriter font with bold face
% To install the luximono font files:
% getnonfreefonts-sys --all or
% getnonfreefonts-sys luximono
%
% when there are trouble you might need to:
% - Create /etc/texmf/updmap.d/99local-luximono.cfg
% containing the single line: Map ul9.map
% - Run update-updmap followed by mktexlsr and updmap-sys
%
% This commands must be executed as root with a root environment
% (i.e. run "sudo su" and then execute the commands in the root
% shell, don't just prefix the commands with "sudo").
% formats the text according the set language
\usepackage[english]{babel}
\usepackage[table,usenames]{xcolor}
% generates indices with the "\index" command
\usepackage{makeidx}
% enables import of graphics. We use pdflatex here so do the pdf optimisation.
%\usepackage[dvips]{graphicx}
\usepackage[pdftex]{graphicx}
\usepackage{pdfpages}
% includes floating objects like tables and figures.
\usepackage{float}
% for generating subfigures with ohne indented captions
\usepackage[hang]{subfigure}
% redefines and smartens captions of figures and tables (indentation, smaller and boldface)
\usepackage[hang,small,bf,center]{caption}
% enables tabstops and the numeration of lines
\usepackage{moreverb}
% enables user defined header and footer lines (former "fancyheadings")
\usepackage{fancyhdr}
% Some smart mathematical stuff
\usepackage{amsmath}
% Package for rotating several objects
\usepackage{rotating}
\usepackage{natbib}
\usepackage{epsf}
\usepackage{dsfont}
\usepackage[algochapter, boxruled, vlined]{algorithm2e}
%Activating and setting of character protruding - if you like
%\usepackage[activate,DVIoutput]{pdfcprot}
% If you really need special chars...
\usepackage[latin1]{inputenc}
% Hyperlinks
\usepackage[colorlinks,hyperindex,plainpages=false,%
pdftitle={Yosys Manual},%
pdfauthor={Clifford Wolf},%
%pdfkeywords={keyword},%
pdfpagelabels,%
pagebackref,%
bookmarksopen=false%
]{hyperref}
% For the two different reference lists ...
\usepackage{multibib}
\usepackage{multirow}
\usepackage{booktabs}
\usepackage{pdfpages}
\usepackage{listings}
\usepackage{pifont}
\usepackage{skull}
% \usepackage{draftwatermark}
\usepackage{tikz}
\usetikzlibrary{calc}
\usetikzlibrary{arrows}
\usetikzlibrary{scopes}
\usetikzlibrary{through}
\usetikzlibrary{shapes.geometric}
\lstset{basicstyle=\ttfamily}
\def\B#1{{\tt\textbackslash{}#1}}
\def\C#1{\lstinline[language=C++]{#1}}
\def\V#1{\lstinline[language=Verilog]{#1}}
\newsavebox{\fixmebox}
\newenvironment{fixme}%
{\newcommand\colboxcolor{FFBBBB}%
\begin{lrbox}{\fixmebox}%
\begin{minipage}{\dimexpr\columnwidth-2\fboxsep\relax}}
{\end{minipage}\end{lrbox}\textbf{FIXME: }\\%
\colorbox[HTML]{\colboxcolor}{\usebox{\fixmebox}}}
\newcites{weblink}{Internet References}
\setcounter{secnumdepth}{3}
\makeindex
\setlength{\oddsidemargin}{4mm}
\setlength{\evensidemargin}{-6mm}
\setlength{\textwidth}{162mm}
\setlength{\textheight}{230mm}
\setlength{\topmargin}{-5mm}
\setlength{\parskip}{1.5ex plus 1ex minus 0.5ex}
\setlength{\parindent}{0pt}
\lstdefinelanguage{liberty}{
morecomment=[s]{/*}{*/},
morekeywords={library,cell,area,pin,direction,function,clocked_on,next_state,clock,ff},
morestring=[b]",
}
\lstdefinelanguage{rtlil}{
morecomment=[l]{\#},
morekeywords={module,attribute,parameter,wire,memory,auto,width,offset,size,input,output,inout,cell,connect,switch,case,assign,sync,low,high,posedge,negedge,edge,always,update,process,end},
morestring=[b]",
}
\begin{document}
\fancypagestyle{mypagestyle}{%
\fancyhf{}%
\fancyhead[C]{\leftmark}%
\fancyfoot[C]{\thepage}%
\renewcommand{\headrulewidth}{0pt}%
\renewcommand{\footrulewidth}{0pt}}
\pagestyle{mypagestyle}
\thispagestyle{empty}
\null\vfil
\begin{center}
\bf\Huge Yosys Manual
\bigskip
\large Clifford Wolf
\end{center}
\vfil\null
\eject
\chapter*{Abstract}
Most of today's digital design is done in HDL code (mostly Verilog or VHDL) and
with the help of HDL synthesis tools.
In special cases such as synthesis for coarse-grain cell libraries or when
testing new synthesis algorithms it might be necessary to write a custom HDL
synthesis tool or add new features to an existing one. It this cases the
availability of a Free and Open Source (FOSS) synthesis tool that can be used
as basis for custom tools would be helpful.
In the absence of such a tool, the Yosys Open SYnthesis Suite (Yosys) was
developed. This document covers the design and implementation of this tool.
At the moment the main focus of Yosys lies on the high-level aspects of
digital synthesis. The pre-existing FOSS logic-synthesis tool ABC is used
by Yosys to perform advanced gate-level optimizations.
An evaluation of Yosys based on real-world designs is included. It is shown
that Yosys can be used as-is to synthesize such designs. The results produced
by Yosys in this tests where successfully verified using formal verification
and are comparable in quality to the results produced by a commercial
synthesis tool.
\bigskip
This document was originally published as bachelor thesis at the Vienna
University of Technology \cite{BACC}.
\chapter*{Abbreviations}
\begin{tabular}{ll}
AIG & And-Inverter-Graph \\
ASIC & Application-Specific Integrated Circuit \\
AST & Abstract Syntax Tree \\
BDD & Binary Decision Diagram \\
BLIF & Berkeley Logic Interchange Format \\
EDA & Electronic Design Automation \\
EDIF & Electronic Design Interchange Format \\
ER Diagram & Entity-Relationship Diagram \\
FOSS & Free and Open-Source Software \\
FPGA & Field-Programmable Gate Array \\
FSM & Finite-state machine \\
HDL & Hardware Description Language \\
LPM & Library of Parameterized Modules \\
RTLIL & RTL Intermediate Language \\
RTL & Register Transfer Level \\
SAT & Satisfiability Problem \\
% SSA & Static Single Assignment Form \\
VHDL & VHSIC Hardware Description Language \\
VHSIC & Very-High-Speed Integrated Circuit \\
YOSYS & Yosys Open SYnthesis Suite \\
\end{tabular}
\tableofcontents
\include{CHAPTER_Intro}
\include{CHAPTER_Basics}
\include{CHAPTER_Approach}
\include{CHAPTER_Overview}
\include{CHAPTER_CellLib}
\include{CHAPTER_Prog}
\include{CHAPTER_Verilog}
\include{CHAPTER_Optimize}
\include{CHAPTER_Techmap}
% \include{CHAPTER_Eval}
\appendix
\include{CHAPTER_Auxlibs}
\include{CHAPTER_Auxprogs}
\chapter{Command Reference Manual}
\label{commandref}
\input{command-reference-manual}
\include{CHAPTER_Appnotes}
% \include{CHAPTER_StateOfTheArt}
\bibliography{literature}
\bibliographystyle{alphadin}
\bibliographyweblink{weblinks}
\bibliographystyleweblink{abbrv}
\end{document}
|
