blob: 1160af6af1b51ed2937a2718fd95085d181483ab (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
|
#!/bin/bash
set -ex
for job in APPNOTE_010_Verilog_to_BLIF APPNOTE_011_Design_Investigation
do
[ -f $job.ok -a $job.ok -nt $job.tex ] && continue
if [ -f $job/make.sh ]; then
cd $job
bash make.sh
cd ..
fi
old_md5=$([ -f $job.aux ] && md5sum < $job.aux || true)
while
pdflatex -shell-escape -halt-on-error $job.tex || exit
new_md5=$(md5sum < $job.aux)
[ "$old_md5" != "$new_md5" ]
do
old_md5="$new_md5"
done
touch $job.ok
done
|
