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path:
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/
manual
/
PRESENTATION_ExSyn
/
opt_01.v
blob: 5d3c1ea49fc04d0e2d2aed30b98dc08fcaac829c (
plain
)
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module
test
(
input
A
,
B
,
output
Y
);
assign
Y
=
A
?
A
?
B
:
1
'b1
:
B
;
endmodule
