aboutsummaryrefslogtreecommitdiffstats
path: root/examples/cmos/testbench_digital.sh
blob: d7ab0fe1f21a723b7775f3597098d83fa3d29e41 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
#!/bin/bash

set -ex

# iverlog simulation
echo "Doing Verilog simulation with iverilog"
iverilog -o counter_tb counter.v counter_tb.v
./counter_tb; gtkwave counter_tb.gtkw &

# yosys synthesis
../../yosys counter_digital.ys

# requires ngspice with xspice support enabled:
ngspice testbench_digital.sp